Jan Kundrát | 90bd7a0 | 2017-11-14 17:40:37 +0100 | [diff] [blame] | 1 | #include "armada-388-clearfog-base.dts" |
Jan Kundrát | 800fcf0 | 2017-11-14 13:27:44 +0100 | [diff] [blame] | 2 | |
| 3 | &w25q32 { |
| 4 | status = "okay"; |
Jan Kundrát | 2333962 | 2017-12-22 20:05:35 +0100 | [diff] [blame] | 5 | /* The chip itself is rated up to 50MHz for regular reads, 60MHz for |
| 6 | * all other transactions, but somehow the mere presence of the |
| 7 | * MAX14830 EV board breaks these transfers. Changing the speed all the |
| 8 | * way down to 100kHz doesn't help. */ |
Jan Kundrát | 800fcf0 | 2017-11-14 13:27:44 +0100 | [diff] [blame] | 9 | }; |
Jan Kundrát | 28658c9 | 2017-11-13 19:32:04 +0100 | [diff] [blame] | 10 | |
| 11 | / { |
| 12 | clocks { |
| 13 | spi_uart_clk: osc_max14830 { |
| 14 | compatible = "fixed-clock"; |
| 15 | #clock-cells = <0>; |
| 16 | clock-frequency = <3686400>; |
| 17 | }; |
| 18 | }; |
Jan Kundrát | 8fd3c5d | 2017-12-16 00:45:57 +0100 | [diff] [blame] | 19 | |
| 20 | soc { |
| 21 | ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 |
| 22 | MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 |
| 23 | MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 |
| 24 | MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 |
| 25 | MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000 |
| 26 | /* all above is from the upstream DTS */ |
| 27 | |
| 28 | /* maybe-default mappings for SPI1 CS0 from the datasheet */ |
| 29 | MBUS_ID(0x01, 0x1a) 0 0xd4000000 0x4000000 |
| 30 | /* SPI1 CS1 */ |
| 31 | MBUS_ID(0x01, 0x5a) 0 0xd8000000 0x4000000 |
| 32 | /* SPI1 CS2 */ |
| 33 | MBUS_ID(0x01, 0x9a) 0 0xd0000000 0x4000000 |
| 34 | >; |
Jan Kundrát | 5f75ea7 | 2018-01-15 16:22:32 +0100 | [diff] [blame] | 35 | |
| 36 | internal-regs { |
| 37 | sdhci@d8000 { |
| 38 | /delete-property/ cd-gpios; |
| 39 | broken-cd; |
| 40 | }; |
| 41 | }; |
Jan Kundrát | 8fd3c5d | 2017-12-16 00:45:57 +0100 | [diff] [blame] | 42 | }; |
Jan Kundrát | 28658c9 | 2017-11-13 19:32:04 +0100 | [diff] [blame] | 43 | }; |
| 44 | |
| 45 | &uart1_pins { |
| 46 | status = "disabled"; |
| 47 | }; |
| 48 | |
| 49 | &uart1 { |
| 50 | status = "disabled"; |
| 51 | }; |
| 52 | |
| 53 | &pinctrl { |
| 54 | hack_pins: hack_pins { |
| 55 | marvell,pins = "mpp25"; |
| 56 | marvell,function = "gpio"; |
| 57 | }; |
| 58 | }; |
| 59 | |
| 60 | &gpio0 { |
| 61 | mikrobus_uart_tx { |
| 62 | gpio-hog; |
| 63 | /* Mark this as "active high", i.e. "1 is 1", so that the interrupts act on the falling edge */ |
| 64 | gpios = <25 GPIO_ACTIVE_HIGH>; |
| 65 | input; |
| 66 | line-name = "SPI-int"; |
| 67 | }; |
| 68 | }; |
| 69 | |
| 70 | &spi1 { |
Jan Kundrát | 8fd3c5d | 2017-12-16 00:45:57 +0100 | [diff] [blame] | 71 | reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50> /* control */ |
| 72 | , <MBUS_ID(0x01, 0x1a) 0 0xffffffff> /* CS0 */ |
| 73 | , <MBUS_ID(0x01, 0x5a) 0 0xffffffff> /* CS1 */ |
| 74 | , <MBUS_ID(0x01, 0x9a) 0 0xffffffff> /* CS2 */ |
| 75 | , <MBUS_ID(0x01, 0xda) 0 0xffffffff> /* CS3 */ |
| 76 | ; |
| 77 | |
Jan Kundrát | 28658c9 | 2017-11-13 19:32:04 +0100 | [diff] [blame] | 78 | max14830: max14830@2 { |
| 79 | compatible = "maxim,max14830"; |
| 80 | reg = <2>; |
| 81 | clocks = <&spi_uart_clk>; |
| 82 | clock-names = "xtal"; |
| 83 | interrupt-parent = <&gpio0>; |
Jan Kundrát | 9050b25 | 2017-12-16 00:45:19 +0100 | [diff] [blame] | 84 | interrupts = <25 IRQ_TYPE_LEVEL_LOW>; |
Jan Kundrát | 28658c9 | 2017-11-13 19:32:04 +0100 | [diff] [blame] | 85 | pinctrl-0 = <&hack_pins>; |
| 86 | pinctrl-names = "default"; |
| 87 | gpio-controller; |
| 88 | #gpio-cells = <2>; |
| 89 | spi-max-frequency = <26000000>; |
| 90 | }; |
| 91 | }; |