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gerrit.cesnet.cz / github / trini / u-boot / fc7e3cc639c28e0e86af633e6f63902809e975dd / drivers / ddr / marvell
  1. 0d0df46 arm: mvebu: Add Marvell's integrated CPUs by Chris Packham · 6 years ago
  2. 247c80d mv_ddr: ddr3: only use active chip-selects when tuning ODT by Chris Packham · 6 years ago
  3. 08dcbc9 mv_ddr: ddr3: fix tRAS timimg parameter by Chris Packham · 6 years ago
  4. cde578f ARM: mvebu: restore license information in mv_ddr_plat.{c,h} by Chris Packham · 6 years ago
  5. ebb1a59 ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 by Chris Packham · 6 years ago
  6. 0315d69 ARM: mvebu: a38x: Add missing SPDX license identfier by Chris Packham · 6 years ago
  7. db363db ARM: mvebu: a38x: use non-zero size for ddr scrubbing by Chris Packham · 6 years ago
  8. e6f6162 ARM: mvebu: a38x: restore support for setting timing by Chris Packham · 6 years ago
  9. 2b4ffbf ARM: mvebu: a38x: sync ddr training code with upstream by Chris Packham · 6 years ago
  10. 00a7767 ARM: mvebu: a38x: remove some unused code by Chris Packham · 6 years ago
  11. c4195d5 ARM: mvebu: a38x: move sys_env_device_rev_get by Chris Packham · 6 years ago
  12. e6fce12 ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESS by Chris Packham · 6 years ago
  13. 83d290c SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 6 years ago
  14. 672e559 ddr: marvell: update ddr controller init and freq by Chris Packham · 7 years ago
  15. 8bddf67 ddr: marvell: update additional ODT setting by Chris Packham · 7 years ago
  16. 2efd27f ddr: marvell: use correct TREFI value by Chris Packham · 7 years ago
  17. dbaf095 ddr: marvell: only assert M_ODT[0] on write for a single CS by Chris Packham · 7 years ago
  18. 1b69ce2 arm: mvebu: ddr3_debug: remove self assignments by xypron.glpk@gmx.de · 7 years ago
  19. a21d636 arm: mvebu: remove self assignment by xypron.glpk@gmx.de · 7 years ago
  20. 90bcc3d driver/ddr: Add support for setting timing in hws_topology_map by Marek Behún · 7 years ago
  21. 51855e8 treewide: remove unneeded semicolons by Masahiro Yamada · 7 years ago
  22. fc0b594 Various, accumulated typos collected from around the tree. by Robert P. J. Day · 8 years ago
  23. a4ca379 drivers: squash lines for immediate return by Masahiro Yamada · 8 years ago
  24. 29b5935 arm: mvebu: a38x: Weed out floating point use by Marek Vasut · 8 years ago
  25. eae4b2b Fix spelling of "occurred". by Vagrant Cascadian · 8 years ago
  26. 44876bf arm: mvebu: Fix ddr3_init() cpu config by Dirk Eibach · 9 years ago
  27. a187559 Use correct spelling of "U-Boot" by Bin Meng · 9 years ago
  28. 4444d23 mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT by Phil Sutter · 9 years ago
  29. 7e1e59a axp: Fix debugging support in DDR3 write leveling by Phil Sutter · 9 years ago
  30. 698ffab arm: mvebu: Make ECC support configurable on Armada XP by Stefan Roese · 9 years ago
  31. cdf1d24 arm: mvebu: ddr: Fix compilation warning by Stefan Roese · 9 years ago
  32. a21b4f0 arm: mvebu: Fix SAR1_CPU_CORE_MASK by Dirk Eibach · 9 years ago
  33. 544acb0 arm: mvebu: a38x: Remove unsupported topologies by Kevin Smith · 9 years ago
  34. 92a3188 bitops: introduce BIT() definition by Heiko Schocher · 9 years ago
  35. 0ceb2da arm: mvebu: Add complete SDRAM ECC scrubbing by Stefan Roese · 9 years ago
  36. a3ed978 arm: mvebu: sdram: Enable ECC support on Armada XP by Stefan Roese · 9 years ago
  37. ad6ac7a arm: mvebu: a38x: Use correct PEX register access macros by Stefan Roese · 9 years ago
  38. f1df936 arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr by Stefan Roese · 10 years ago
  39. ff9112d arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory by Stefan Roese · 10 years ago