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gerrit.cesnet.cz / github / trini / u-boot / 47e801bec360e69e4b087a141d015b318e1b0212 / cpu / mpc85xx
  1. 06f4328 Merge branch 'master' into next by Wolfgang Denk · 15 years ago
  2. 25643d4 ppc/85xx: make boot from NAND full relocation to RAM by Mingkai Hu · 15 years ago
  3. cdbdbe6 ppc/85xx: Fix how we determine the number of CAM entries by Kumar Gala · 15 years ago
  4. ff882295 ppc/85xx: Fix misc L2 cache enabling bug by Dave Liu · 15 years ago
  5. 4946775 Coding Style cleanup; update CHANGELOG, prepare -rc1 by Wolfgang Denk · 15 years ago v2009.11-rc1
  6. 7f52ed5 mpc85xx: Add eSDHC support for MPC8569E-MDS boards by Anton Vorontsov · 15 years ago
  7. 5ccd29c 85xx: MP Boot Page Translation update by Peter Tyser · 15 years ago
  8. da0e5f7 ppc/85xx: Fix crashes due to generation of SPE instruction by Leon Woestenberg · 15 years ago
  9. 654ea1f ppc/85xx: Make L2 support more robust by Dave Liu · 15 years ago
  10. afc3ba0 relocation: Do not relocate NULL pointers. by Joakim Tjernlund · 15 years ago
  11. 3beb40c 85xx: Ensure BSS segment isn't linked at address 0 by Peter Tyser · 15 years ago
  12. 8582901 ppc: Enable full relocation to RAM by Peter Tyser · 15 years ago
  13. 39aaca1 ppc/p4080: Determine various chip frequencies on CoreNet platforms by Kumar Gala · 16 years ago
  14. 3c2a67e ppc/p4080: Handle timebase enabling and frequency reporting by Kumar Gala · 15 years ago
  15. 7e4259b ppc/p4080: Add various p4080 related defines (and p4040) by Kumar Gala · 16 years ago
  16. 39a7e7f ppc/p4080: CoreNet platfrom style secondary core release by Kumar Gala · 15 years ago
  17. a880cf3 ppc/p4080: CoreNet platfrom style CCSRBAR setting by Kumar Gala · 15 years ago
  18. 25bacf7 ppc/85xx: Fix enabling of L2 cache by Kumar Gala · 15 years ago
  19. cb0ff65 85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ by Vivek Mahajan · 15 years ago
  20. 234a89d ppc/85xx: add cpu init config file for boot from NAND by Mingkai Hu · 15 years ago
  21. 098bcba ppc/85xx: add ld script file for boot from NAND by Mingkai Hu · 15 years ago
  22. 15fba32 ppc/85xx: Disable all async interrupt sources when we boot by Kumar Gala · 15 years ago
  23. 9f00409 ppc/85xx: Split out cpu_init_early into its own file for NAND_SPL by Kumar Gala · 15 years ago
  24. 0456dbf ppc/85xx: Change cpu_init_early_f so we can use with NAND SPL by Kumar Gala · 15 years ago
  25. 7da5335 ppc/85xx: add boot from NAND/eSDHC/eSPI support by Mingkai Hu · 15 years ago
  26. b2eec28 ppc/85xx: Move code around to prep for NAND_SPL by Kumar Gala · 15 years ago
  27. 206af35 ppc/85xx: Repack tlb_table to save space by Kumar Gala · 15 years ago
  28. d30f904 ppc/85xx: Introduce low level write_tlb function by Kumar Gala · 15 years ago
  29. 3e3c9c1 ppc/85xx: Remove some bogus code from external interrupt handler. by Scott Wood · 15 years ago
  30. dcc87dd ppc/85xx: Ensure that MAS8 is zero when writing TLB entries. by Scott Wood · 15 years ago
  31. 1b72dbe ppc/85xx: Don't enable interrupts before we're ready by Scott Wood · 15 years ago
  32. 6c97a20 ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address by Kumar Gala · 15 years ago
  33. c348322 ppc/85xx: Clean up do_reset by Kumar Gala · 15 years ago
  34. 21170c8 ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu(). by Poonam Aggrwal · 15 years ago
  35. f8027f6 ppc/85xx/86xx: Device tree fixup for number of cores by Poonam Aggrwal · 15 years ago
  36. 58442dc ppc/85xx,86xx: Handling Unknown SOC version by Poonam Aggrwal · 15 years ago
  37. 5052a77 ppc/85xx: Cleanup makefile and related optional files by Kumar Gala · 15 years ago
  38. c725908 ppc/85xx: Fix bug in setup_mp code by Kumar Gala · 15 years ago
  39. c2287af ppc/85xx: Add a simple function to search the TLB by Kumar Gala · 15 years ago
  40. 26f4cdba 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · 15 years ago
  41. da1cd95 ppc/85xx: Fix up eSDHC controller clock frequency in the device tree by Dipen Dudhat · 15 years ago
  42. 2abbd31 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist by Kumar Gala · 15 years ago
  43. 6b9ea08 ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk by Dipen Dudhat · 15 years ago
  44. 05f6f66 85xx: Improve MPIC initialization by Timur Tabi · 15 years ago
  45. a713ba9 85xx: Added single core members of FSL P1xx/P2xx processors series by Poonam Aggrwal · 15 years ago
  46. 76b474e 85xx: Add L2SRAM Register's macro definition by Mingkai Hu · 15 years ago
  47. ec79d33 85xx: Move to a common linker script by Kumar Gala · 15 years ago
  48. 87c7661 85xx: Added P1020 Processor Support. by Poonam Aggrwal · 15 years ago
  49. 0e87098 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx by Poonam Aggrwal · 15 years ago
  50. 18bacc2 8xxx: Refactored common cpu specific code for 85xx/86xx into one file. by Poonam Aggrwal · 15 years ago
  51. 53efa1f 85xx: Remove redudant PLATFORM_CPPFLAGS by Kumar Gala · 15 years ago
  52. 963f2f6 Prepare 2009.08-rc3 by Wolfgang Denk · 15 years ago v2009.08-rc3
  53. e393e2e 85xx: Fix addrmap to include memory by Kumar Gala · 15 years ago
  54. 4c2e3da Update Freescale copyrights to remove "All Rights Reserved" by Kumar Gala · 15 years ago
  55. 0d595f7 fsl_dma: Break out common memory initialization function by Peter Tyser · 15 years ago
  56. 79f4333 8xxx: Move dma_init() call to common code by Peter Tyser · 15 years ago
  57. 191c711 fsl_dma: Move dma function prototypes to common header file by Peter Tyser · 15 years ago
  58. 7892f61 8xxx: Rename dma_xfer() to dmacpy() by Peter Tyser · 15 years ago
  59. 017f11f 8xxx: Break out DMA code to a common file by Peter Tyser · 15 years ago
  60. 2f21ce4 fsl/85xx, 86xx: Sync up DMA code by Peter Tyser · 15 years ago
  61. b1f1265 fsl: Create common fsl_dma.h for 85xx and 86xx cpus by Peter Tyser · 15 years ago
  62. 8e55258 qe: Pass in uec_info struct through uec_initialize by Haiying Wang · 15 years ago
  63. b3d7f20 85xx: Add QE clk support by Haiying Wang · 15 years ago
  64. 71b358c 85xx: Added MPC8535/E identifiers by Kumar Gala · 15 years ago
  65. 22419d7 85xx: Always attempt ethernet device tree fixup by Kumar Gala · 15 years ago
  66. d4b130d 85xx: Use print_size to report amount of memory not mapped by TLBs by Kumar Gala · 15 years ago
  67. 90d13b8 85xx: bugfix for reading maximum TLB size on mpc85xx by Fredrik Arnerup · 15 years ago
  68. c840d26 85xx: Introduce determine_mp_bootpg() helper. by Kumar Gala · 16 years ago
  69. 22b6dbc MPC85xx: Add MPC8569 CPU support by Haiying Wang · 16 years ago
  70. 1b3e404 85xx: Add support for additional e500mc features by Kumar Gala · 16 years ago
  71. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  72. 0ee84b8 Fix mpc85xx ddr-gen3 ddr_sdram_cfg. by Ed Swarthout · 16 years ago
  73. 1bba30e Coding style cleanup, update CHANGELOG by Wolfgang Denk · 16 years ago
  74. 80522dc 85xx: Add eSDHC support for 8536 DS by Andy Fleming · 16 years ago
  75. e1be0d2 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · 16 years ago
  76. 8d949af mpc85xx: Add support for the P2020 by Srikanth Srinivasan · 16 years ago
  77. f8523cb 85xx: Fix how we map DDR memory by Kumar Gala · 16 years ago
  78. b29dee3 85xx: Format cpu freq printing to handle 8 cores by Kumar Gala · 16 years ago
  79. 2fc7eb0 Add secondary CPUs processor frequency for e500 core by Haiying Wang · 16 years ago
  80. 5f91ef6 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards by Kumar Gala · 16 years ago
  81. 10795f4 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards by Kumar Gala · 16 years ago
  82. 9502643 Change DDR tlb start entry to CONFIG param for 85xx by Haiying Wang · 16 years ago
  83. ada591d mpc8[56]xx: Put localbus clock in sysinfo and gd by Trent Piepho · 16 years ago
  84. 446c381 mpc8568: Double local bus clock divider by Trent Piepho · 16 years ago
  85. f51f07e 85xx: Fix the boot window issue by Dave Liu · 16 years ago
  86. 181a365 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · 16 years ago
  87. a5d212a mpc8xxx: LCRR[CLKDIV] is sometimes five bits by Trent Piepho · 16 years ago
  88. 58ec486 mpc8[56]xx: Put localbus clock in device tree by Trent Piepho · 16 years ago
  89. ecf5b98 85xx: Add support to populate addr map based on TLB settings by Kumar Gala · 16 years ago
  90. 561858e Update U-Boot's build timestamp on every compile by Peter Tyser · 16 years ago
  91. 9df5953 85xx: init gd as early as possible by Kumar Gala · 16 years ago
  92. aed461a 85xx: Fix relocation of CCSRBAR by Kumar Gala · 16 years ago
  93. 9427ccd 85xx: Add PORDEVSR_PCI1 define by Peter Tyser · 16 years ago
  94. a2cd50e 85xx: Add CPU 2 errata workaround to all 8548 boards by Peter Tyser · 16 years ago
  95. 0e8454e Moved initialization of QE Ethernet controller to cpu_eth_init() by Ben Warren · 16 years ago
  96. 3456a14 Moved initialization of FCC Ethernet controller to cpu_eth_init by Ben Warren · 16 years ago
  97. 62e15b4 Fix typo in cpu/mpc85xx/cpu.c by Ben Warren · 16 years ago
  98. ae5f943 85xx: Fix the incorrect register used for DDR erratum1 by Dave Liu · 16 years ago
  99. 0f060c3 85xx: Add basic e500mc core support by Kumar Gala · 16 years ago
  100. a38a5b6 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number by Kumar Gala · 16 years ago