commit | 950264317eb9594b2b5ee2fb65206200a1c6007a | [log] [tgz] |
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author | Haiying Wang <Haiying.Wang@freescale.com> | Tue Jan 13 16:29:22 2009 -0500 |
committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | Tue Jan 13 16:47:07 2009 -0600 |
tree | 255119caa0618014d075f5ea680522c2326ad5b1 | |
parent | 6d3a10f73ece7ffb736890c10e023222612a4aa0 [diff] |
Change DDR tlb start entry to CONFIG param for 85xx So that we can locate the DDR tlb start entry to the value other than 8. By default, it is still 8. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>