Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / 2d934e5703b712686c3ec67f6d5eeb137c68805d / arch / x86
  1. d19ee5c x86: ivybridge: Only run the Video BIOS when video is enabled by Simon Glass · 10 years ago
  2. 6c911c4 x86: Drop RAMTOP Kconfig by Simon Glass · 10 years ago
  3. bbd43d6 x86: Correct XIP_ROM_SIZE by Simon Glass · 10 years ago
  4. b21b208 x86: crownbay: Add pci devices in the dts file by Bin Meng · 10 years ago
  5. 1eb47ef x86: Use ePAPR defined properties for x86-uart by Bin Meng · 10 years ago
  6. 949dbc1 x86: Simplify the fsp hob access functions by Bin Meng · 10 years ago
  7. 8f9052f pci: Make pci apis usable before relocation by Bin Meng · 10 years ago
  8. fa5530b x86: Support pci bus scan in the early phase by Bin Meng · 10 years ago
  9. 4722c03 x86: Add missing DECLARE_GLOBAL_DATA_PTR for pci.c by Bin Meng · 10 years ago
  10. 120c416 x86: Clean up the board dts files by Bin Meng · 10 years ago
  11. 9ca5a0c x86: Rename coreboot.dsti to serial.dtsi by Bin Meng · 10 years ago
  12. 57706e4 x86: Remove alex.dts in arch/x86/dts by Bin Meng · 10 years ago
  13. 255fd5c x86: Clean up the FSP support codes by Bin Meng · 10 years ago
  14. 41702ba x86: Rename coreboot-serial to x86-serial by Bin Meng · 10 years ago
  15. aada627 x86: crownbay: Add SDHCI support by Bin Meng · 10 years ago
  16. adfe3b2 x86: crownbay: Add SPI flash support by Bin Meng · 10 years ago
  17. 8c5224c x86: Use consistent name XXX_ADDR for binary blob flash address by Bin Meng · 10 years ago
  18. 58f542d x86: Add queensbay and crownbay Kconfig files by Bin Meng · 10 years ago
  19. 240a79d x86: Enable the queensbay cpu directory build by Bin Meng · 10 years ago
  20. b71eec3 x86: ich6-gpio: Add Intel Tunnel Creek GPIO support by Bin Meng · 10 years ago
  21. 0f61de8 x86: Convert microcode format to device-tree-only by Simon Glass · 10 years ago
  22. b2e02d2 x86: Add basic support to queensbay platform and crownbay board by Bin Meng · 10 years ago
  23. efbeeaf x86: Integrate Tunnel Creek processor microcode by Bin Meng · 10 years ago
  24. b591ee3 x86: Correct problems in the microcode loading by Simon Glass · 10 years ago
  25. cf29e3e x86: ivybridge: Update the microcode by Simon Glass · 10 years ago
  26. 81f79ef x86: Move microcode updates into a separate directory by Simon Glass · 10 years ago
  27. e6126a5 x86: move arch-specific asmlinkage to <asm/linkage.h> by Masahiro Yamada · 10 years ago
  28. ba7b38a x86: Add a simple command to show FSP HOB information by Bin Meng · 10 years ago
  29. bceb9f0 x86: Support Intel FSP initialization path in start.S by Bin Meng · 10 years ago
  30. 95a5a47 x86: Add post failure codes for bist and car by Bin Meng · 10 years ago
  31. 8e04d4c x86: queensbay: Adapt FSP support codes by Bin Meng · 10 years ago
  32. 752a0b0 x86: Initial import from Intel FSP release for Queensbay platform by Bin Meng · 10 years ago
  33. a2927e0 x86: Add a simple superio driver for SMSC LPC47M by Bin Meng · 10 years ago
  34. 568868d x86: Add Intel Crown Bay board dts file by Bin Meng · 10 years ago
  35. 2795573 x86: ich6-gpio: Move setup_pch_gpios() to board support codes by Bin Meng · 10 years ago
  36. fe0c33a x86: Clean up asm-offsets by Bin Meng · 10 years ago
  37. 64542f4 x86: Make ROM_SIZE configurable in Kconfig by Bin Meng · 10 years ago
  38. afc366f Replace <compiler.h> with <linux/compiler.h> by Masahiro Yamada · 10 years ago
  39. e19db55 Kbuild: introduce Makefile in arch/$ARCH/ by Daniel Schwierzeck · 10 years ago
  40. f3e56fe x86: dts: Add video information to the device tree by Simon Glass · 10 years ago
  41. effcf06 x86: Add initial video device init for Intel GMA by Simon Glass · 10 years ago
  42. 0ca2426 x86: Add support for running option ROMs natively by Simon Glass · 10 years ago
  43. 22465fc x86: Add vesa mode configuration options by Simon Glass · 10 years ago
  44. e34aef1 x86: Add GDT descriptors for option ROMs by Simon Glass · 10 years ago
  45. 2477427 x86: ivybridge: Add northbridge init functions by Simon Glass · 10 years ago
  46. d1ef113 x86: Drop some msr functions that we don't support by Simon Glass · 10 years ago
  47. bb80be3 x86: Add init for model 206AX CPU by Simon Glass · 10 years ago
  48. 0c9075e x86: Add LAPIC setup code by Simon Glass · 10 years ago
  49. b636dd1 x86: Drop old CONFIG_INTEL_CORE_ARCH code by Simon Glass · 10 years ago
  50. 1dae2e0 x86: Refactor interrupt_init() by Bin Meng · 10 years ago
  51. a549f74 x86: Remove cpu_init_r() for x86 by Bin Meng · 10 years ago
  52. 4372a9e x86: Call cpu_init_interrupts() from interrupt_init() by Bin Meng · 10 years ago
  53. 18739e2 x86: Add Intel speedstep and turbo mode code by Simon Glass · 10 years ago
  54. a6d4c45 x86: ivybridge: Set up XHCI USB by Simon Glass · 10 years ago
  55. 9baeca4 x86: ivybridge: Set up EHCI USB by Simon Glass · 10 years ago
  56. 4896f4a x86: dts: Add SATA settings for link by Simon Glass · 10 years ago
  57. 3ac8393 x86: ivybridge: Add SATA init by Simon Glass · 10 years ago
  58. 05efc39 x86: dts: Add LPC settings for link by Simon Glass · 10 years ago
  59. b021e05 x86: dts: Move PCI peripherals into a pci node by Simon Glass · 10 years ago
  60. 72cd085 x86: ivybridge: Add additional LPC init by Simon Glass · 10 years ago
  61. 8c74a57 x86: ivybridge: Add PCH init by Simon Glass · 10 years ago
  62. 3e0332c x86: Add a simple header file for ACPI by Simon Glass · 10 years ago
  63. 4e7a6ac x86: ivybridge: Add support for BD82x6x PCH by Simon Glass · 10 years ago
  64. a0bd851 x86: Set up edge triggering on interrupt 9 by Simon Glass · 10 years ago
  65. e94ea6f x86: pci: Add handlers before and after a PCI hose scan by Simon Glass · 10 years ago
  66. a2f5d09 x86: Add ioapic.h header by Simon Glass · 10 years ago
  67. a6a9578 x86: Factor out common values in the link script by Simon Glass · 10 years ago
  68. 091c494 x86: Ensure that all relocation data is included in the image by Simon Glass · 10 years ago
  69. 512e581 x86: Panic if there is no relocation data by Simon Glass · 10 years ago
  70. 65990d5 x86: Remove board_early_init_r() by Simon Glass · 10 years ago
  71. 2f6d42b x86: Add ivybridge directory to Makefile by Simon Glass · 10 years ago
  72. 746667f Merge git://git.denx.de/u-boot-x86 by Tom Rini · 10 years ago
  73. 37c9940 x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory by Masahiro Yamada · 10 years ago
  74. 165ecd2 kbuild: Descend into SOC directory from CPU directory by Masahiro Yamada · 10 years ago
  75. b414119 linux/kernel.h: sync min, max, min3, max3 macros with Linux by Masahiro Yamada · 10 years ago
  76. fe5b9b4 x86: Rename chromebook-x86 to coreboot by Simon Glass · 10 years ago
  77. 65dd74a x86: ivybridge: Implement SDRAM init by Simon Glass · 10 years ago
  78. 3eafce0 x86: ivybridge: Add LAPIC support by Simon Glass · 10 years ago
  79. a49e3c7 x86: Make show_boot_progress() common by Simon Glass · 10 years ago
  80. 437c2b7 x86: chromebook_link: Enable GPIO support by Simon Glass · 10 years ago
  81. 1b4f25f x86: ivybridge: Add support for early GPIO init by Simon Glass · 10 years ago
  82. 8e0df06 x86: ivybridge: Add early init for PCH devices by Simon Glass · 10 years ago
  83. 9c678e1 x86: dts: Add microcode updates for ivybridge CPU by Simon Glass · 10 years ago
  84. 77f9b1f x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · 10 years ago
  85. 94060ff x86: ivybridge: Check BIST value on boot by Simon Glass · 10 years ago
  86. f5fbbe9 x86: ivybridge: Perform initial CPU setup by Simon Glass · 10 years ago
  87. eddbad2 x86: Add msr read/write functions that use a structure by Simon Glass · 10 years ago
  88. 3f70a6f x86: Add clr/setbits functions by Simon Glass · 10 years ago
  89. 378a863 x86: Tidy up coreboot header usage by Simon Glass · 10 years ago
  90. 2b60515 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · 10 years ago
  91. 6fb3b72 x86: pci: Allow configuration before relocation by Simon Glass · 10 years ago
  92. 6e5b12b x86: ivybridge: Enable PCI in early init by Simon Glass · 10 years ago
  93. 7430f10 x86: Support use of PCI before relocation by Simon Glass · 10 years ago
  94. d188b18 x86: Refactor PCI to permit alternate init by Simon Glass · 10 years ago
  95. 70a09c6 x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · 10 years ago
  96. d1cd045 x86: Emit post codes in startup code for Chromebooks by Simon Glass · 10 years ago
  97. fce7b27 x86: Build a .rom file which can be flashed to an x86 machine by Simon Glass · 10 years ago
  98. 8ef0757 x86: Add chromebook_link board by Simon Glass · 10 years ago
  99. 5c1b685 x86: Allow timer calibration to work on ivybridge by Simon Glass · 10 years ago
  100. a5eb04d x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory by Masahiro Yamada · 10 years ago