blob: a068bc6846c6a0f8a7a4779d614f6cd83d27e1f3 [file] [log] [blame]
Joseph Chen695693b2021-06-02 16:13:46 +08001CONFIG_ARM=y
Tom Rinia2ac2b92021-08-27 21:18:30 -04002CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanabf8d962022-04-13 17:47:20 +08003CONFIG_COUNTER_FREQUENCY=24000000
Joseph Chen695693b2021-06-02 16:13:46 +08004CONFIG_ARCH_ROCKCHIP=y
Jonas Karlman7b00e7e2024-05-04 19:43:00 +00005CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-evb1-v10"
Joseph Chen695693b2021-06-02 16:13:46 +08006CONFIG_ROCKCHIP_RK3568=y
Nico Chengdaec31e2021-10-26 10:42:19 +08007CONFIG_SPL_SERIAL=y
Tom Rinid8927022024-10-08 09:18:32 -06008CONFIG_SYS_LOAD_ADDR=0xc00800
Joseph Chen695693b2021-06-02 16:13:46 +08009CONFIG_DEBUG_UART_BASE=0xFE660000
10CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rinid46e86d2022-04-08 13:36:51 -040011CONFIG_DEBUG_UART=y
Nico Chengdaec31e2021-10-26 10:42:19 +080012CONFIG_FIT=y
13CONFIG_FIT_VERBOSE=y
Jonas Karlman703c1702023-05-17 18:26:32 +000014CONFIG_SPL_FIT_SIGNATURE=y
Nico Chengdaec31e2021-10-26 10:42:19 +080015CONFIG_SPL_LOAD_FIT=y
Jonas Karlmane3765082023-06-26 19:43:06 +000016CONFIG_LEGACY_IMAGE_FORMAT=y
Jonas Karlman7b00e7e2024-05-04 19:43:00 +000017CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb1-v10.dtb"
Joseph Chen695693b2021-06-02 16:13:46 +080018# CONFIG_DISPLAY_CPUINFO is not set
19CONFIG_DISPLAY_BOARDINFO_LATE=y
Jonas Karlman703c1702023-05-17 18:26:32 +000020CONFIG_SPL_MAX_SIZE=0x40000
Tom Rinica8a3292022-05-16 17:20:26 -040021CONFIG_SPL_PAD_TO=0x7f8000
Nico Chengdaec31e2021-10-26 10:42:19 +080022# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Nico Chengdaec31e2021-10-26 10:42:19 +080023CONFIG_SPL_ATF=y
Jonas Karlman703c1702023-05-17 18:26:32 +000024CONFIG_CMD_GPIO=y
Joseph Chen695693b2021-06-02 16:13:46 +080025CONFIG_CMD_GPT=y
Jonas Karlman703c1702023-05-17 18:26:32 +000026CONFIG_CMD_I2C=y
Joseph Chen695693b2021-06-02 16:13:46 +080027CONFIG_CMD_MMC=y
28# CONFIG_CMD_SETEXPR is not set
Jonas Karlman703c1702023-05-17 18:26:32 +000029CONFIG_CMD_PMIC=y
30CONFIG_CMD_REGULATOR=y
Nico Chengdaec31e2021-10-26 10:42:19 +080031# CONFIG_SPL_DOS_PARTITION is not set
32CONFIG_SPL_OF_CONTROL=y
33CONFIG_OF_LIVE=y
Jonas Karlman20b28522024-04-22 06:28:51 +000034CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Jonas Karlman25f56452023-10-01 19:17:21 +000035CONFIG_SPL_DM_SEQ_ALIAS=y
Nico Chengdaec31e2021-10-26 10:42:19 +080036CONFIG_SPL_REGMAP=y
37CONFIG_SPL_SYSCON=y
38CONFIG_SPL_CLK=y
Joseph Chen695693b2021-06-02 16:13:46 +080039CONFIG_ROCKCHIP_GPIO=y
40CONFIG_SYS_I2C_ROCKCHIP=y
41CONFIG_MISC=y
Tom Rinid5bfef22021-12-11 14:55:53 -050042CONFIG_SUPPORT_EMMC_RPMB=y
Joseph Chen695693b2021-06-02 16:13:46 +080043CONFIG_MMC_DW=y
44CONFIG_MMC_DW_ROCKCHIP=y
45CONFIG_MMC_SDHCI=y
46CONFIG_MMC_SDHCI_SDMA=y
47CONFIG_MMC_SDHCI_ROCKCHIP=y
Jonas Karlman25f56452023-10-01 19:17:21 +000048CONFIG_PHY_REALTEK=y
49CONFIG_DWC_ETH_QOS=y
50CONFIG_DWC_ETH_QOS_ROCKCHIP=y
Jonas Karlman20b28522024-04-22 06:28:51 +000051CONFIG_SPL_PINCTRL=y
Jonas Karlman703c1702023-05-17 18:26:32 +000052CONFIG_DM_PMIC=y
53CONFIG_PMIC_RK8XX=y
54CONFIG_REGULATOR_RK8XX=y
Joseph Chen695693b2021-06-02 16:13:46 +080055CONFIG_PWM_ROCKCHIP=y
Nico Chengdaec31e2021-10-26 10:42:19 +080056CONFIG_SPL_RAM=y
Joseph Chen695693b2021-06-02 16:13:46 +080057CONFIG_BAUDRATE=1500000
58CONFIG_DEBUG_UART_SHIFT=2
Tom Rini9591b632022-12-04 09:39:03 -050059CONFIG_SYS_NS16550_MEM32=y
Joseph Chen695693b2021-06-02 16:13:46 +080060CONFIG_SYSRESET=y
Joseph Chen695693b2021-06-02 16:13:46 +080061CONFIG_ERRNO_STR=y