blob: 968501602aaa42a65df37ff523a88b21c199ed48 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Stephen Warrenc7ba99c2016-05-12 13:32:55 -06002/*
3 * Copyright 2013-2016, NVIDIA CORPORATION.
Stephen Warrenc7ba99c2016-05-12 13:32:55 -06004 */
5
6#ifndef _TEGRA186_COMMON_H_
7#define _TEGRA186_COMMON_H_
8
9#include "tegra-common.h"
10
Stephen Warrenc7ba99c2016-05-12 13:32:55 -060011/*
12 * NS16550 Configuration
13 */
14#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
15
Stephen Warrenc7ba99c2016-05-12 13:32:55 -060016/*-----------------------------------------------------------------------
17 * Physical Memory Map
18 */
19
Peter Robinsonfe669922020-04-02 00:28:55 +010020#undef FDTFILE
21#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \
22 "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \
23 "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \
24 "fi; "
25
Stephen Warrenc7ba99c2016-05-12 13:32:55 -060026/*
27 * Memory layout for where various images get loaded by boot scripts:
28 *
29 * scriptaddr can be pretty much anywhere that doesn't conflict with something
30 * else. Put it above BOOTMAPSZ to eliminate conflicts.
31 *
32 * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
33 * something else. Put it above BOOTMAPSZ to eliminate conflicts.
34 *
35 * kernel_addr_r must be within the first 128M of RAM in order for the
36 * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
37 * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
38 * should not overlap that area, or the kernel will have to copy itself
39 * somewhere else before decompression. Similarly, the address of any other
40 * data passed to the kernel shouldn't overlap the start of RAM. Pushing
41 * this up to 16M allows for a sizable kernel to be decompressed below the
42 * compressed load address.
43 *
44 * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
45 * the compressed kernel to be up to 16M too.
46 *
47 * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
48 * for the FDT/DTB to be up to 1M, which is hopefully plenty.
49 */
Stephen Warrenc7ba99c2016-05-12 13:32:55 -060050#define MEM_LAYOUT_ENV_SETTINGS \
51 "scriptaddr=0x90000000\0" \
52 "pxefile_addr_r=0x90100000\0" \
Tom Rini72d81362021-08-23 10:25:30 -040053 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
Stephen Warrenc7ba99c2016-05-12 13:32:55 -060054 "fdt_addr_r=0x82000000\0" \
55 "ramdisk_addr_r=0x82100000\0"
56
Stephen Warrenc7ba99c2016-05-12 13:32:55 -060057#endif