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Stefano Babicb9bb0532011-01-20 07:49:52 +00001/*
2 * (C) Copyright 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Stefano Babicb9bb0532011-01-20 07:49:52 +00006 */
7
8#ifndef __ASM_ARCH_CLOCK_H
9#define __ASM_ARCH_CLOCK_H
10
Benoît Thébaudeau9c6c5c02012-08-21 11:07:20 +000011#include <common.h>
12
13#ifdef CONFIG_MX35_HCLK_FREQ
14#define MXC_HCLK CONFIG_MX35_HCLK_FREQ
15#else
16#define MXC_HCLK 24000000
17#endif
18
19#ifdef CONFIG_MX35_CLK32
20#define MXC_CLK32 CONFIG_MX35_CLK32
21#else
22#define MXC_CLK32 32768
23#endif
24
Stefano Babicb9bb0532011-01-20 07:49:52 +000025enum mxc_clock {
Benoît Thébaudeau7c803262012-08-14 10:32:21 +000026 MXC_ARM_CLK,
Stefano Babicb9bb0532011-01-20 07:49:52 +000027 MXC_AHB_CLK,
28 MXC_IPG_CLK,
29 MXC_IPG_PERCLK,
30 MXC_UART_CLK,
Benoît Thébaudeau6e3dc122012-09-27 10:26:02 +000031 MXC_ESDHC1_CLK,
32 MXC_ESDHC2_CLK,
33 MXC_ESDHC3_CLK,
Stefano Babicb9bb0532011-01-20 07:49:52 +000034 MXC_USB_CLK,
35 MXC_CSPI_CLK,
36 MXC_FEC_CLK,
Matthias Weissere7bed5c2012-09-24 02:46:53 +000037 MXC_I2C_CLK,
Stefano Babicb9bb0532011-01-20 07:49:52 +000038};
39
Benoît Thébaudeau7c803262012-08-14 10:32:21 +000040enum mxc_main_clock {
41 CPU_CLK,
42 AHB_CLK,
43 IPG_CLK,
44 IPG_PER_CLK,
45 NFC_CLK,
46 USB_CLK,
47 HSP_CLK,
48};
49
50enum mxc_peri_clock {
51 UART1_BAUD,
52 UART2_BAUD,
53 UART3_BAUD,
54 SSI1_BAUD,
55 SSI2_BAUD,
56 CSI_BAUD,
57 MSHC_CLK,
58 ESDHC1_CLK,
59 ESDHC2_CLK,
60 ESDHC3_CLK,
61 SPDIF_CLK,
62 SPI1_CLK,
63 SPI2_CLK,
64};
65
Stefano Babicb9bb0532011-01-20 07:49:52 +000066u32 imx_get_uartclk(void);
67u32 imx_get_fecclk(void);
68unsigned int mxc_get_clock(enum mxc_clock clk);
69
70#endif /* __ASM_ARCH_CLOCK_H */