blob: 733fe96726bbb360d470293a621b86adac646db1 [file] [log] [blame]
Klaus Gogera13110a2017-04-07 19:13:38 +02001/*
2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6#include <common.h>
7#include <dm.h>
Philipp Tomsiche92e5802017-04-28 17:31:44 +02008#include <misc.h>
9#include <ram.h>
Klaus Gogera13110a2017-04-07 19:13:38 +020010#include <dm/pinctrl.h>
11#include <dm/uclass-internal.h>
Philipp Tomsich9415b9a2017-05-05 19:21:39 +020012#include <asm/setup.h>
Klaus Gogera13110a2017-04-07 19:13:38 +020013#include <asm/arch/periph.h>
14#include <power/regulator.h>
Philipp Tomsiche92e5802017-04-28 17:31:44 +020015#include <u-boot/sha256.h>
16
Klaus Gogera13110a2017-04-07 19:13:38 +020017DECLARE_GLOBAL_DATA_PTR;
18
19int board_init(void)
20{
21 struct udevice *pinctrl, *regulator;
22 int ret;
23
24 /*
25 * The PWM does not have decicated interrupt number in dts and can
26 * not get periph_id by pinctrl framework, so let's init them here.
27 * The PWM2 and PWM3 are for pwm regulators.
28 */
29 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
30 if (ret) {
31 debug("%s: Cannot find pinctrl device\n", __func__);
32 goto out;
33 }
34
35 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
36 if (ret) {
37 debug("%s PWM2 pinctrl init fail!\n", __func__);
38 goto out;
39 }
40
41 /* rk3399 need to init vdd_center to get the correct output voltage */
42 ret = regulator_get_by_platname("vdd_center", &regulator);
43 if (ret)
44 debug("%s: Cannot get vdd_center regulator\n", __func__);
45
46 ret = regulator_get_by_platname("vcc5v0_host", &regulator);
47 if (ret) {
48 debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
49 goto out;
50 }
51
52 ret = regulator_set_enable(regulator, true);
53 if (ret) {
54 debug("%s vcc5v0-host-en set fail!\n", __func__);
55 goto out;
56 }
57
58out:
59 return 0;
60}
61
Klaus Goger8adc9d12017-05-05 19:21:40 +020062static void setup_macaddr(void)
63{
64#if CONFIG_IS_ENABLED(CMD_NET)
65 int ret;
66 const char *cpuid = getenv("cpuid#");
67 u8 hash[SHA256_SUM_LEN];
68 int size = sizeof(hash);
69 u8 mac_addr[6];
70
71 /* Only generate a MAC address, if none is set in the environment */
72 if (getenv("ethaddr"))
73 return;
74
75 if (!cpuid) {
76 debug("%s: could not retrieve 'cpuid#'\n", __func__);
77 return;
78 }
79
80 ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
81 if (ret) {
82 debug("%s: failed to calculate SHA256\n", __func__);
83 return;
84 }
85
86 /* Copy 6 bytes of the hash to base the MAC address on */
87 memcpy(mac_addr, hash, 6);
88
89 /* Make this a valid MAC address and set it */
90 mac_addr[0] &= 0xfe; /* clear multicast bit */
91 mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
Simon Glassfd1e9592017-08-03 12:22:11 -060092 eth_env_set_enetaddr("ethaddr", mac_addr);
Klaus Goger8adc9d12017-05-05 19:21:40 +020093#endif
94
95 return;
96}
97
Philipp Tomsich9415b9a2017-05-05 19:21:39 +020098static void setup_serial(void)
99{
100#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
Kever Yang26722332017-07-27 19:59:03 +0800101 const u32 cpuid_offset = 0x7;
102 const u32 cpuid_length = 0x10;
103
Philipp Tomsich9415b9a2017-05-05 19:21:39 +0200104 struct udevice *dev;
105 int ret, i;
Kever Yang26722332017-07-27 19:59:03 +0800106 u8 cpuid[cpuid_length];
107 u8 low[cpuid_length/2], high[cpuid_length/2];
108 char cpuid_str[cpuid_length * 2 + 1];
Philipp Tomsich9415b9a2017-05-05 19:21:39 +0200109 u64 serialno;
110 char serialno_str[16];
111
Klaus Goger8adc9d12017-05-05 19:21:40 +0200112 /* retrieve the device */
113 ret = uclass_get_device_by_driver(UCLASS_MISC,
114 DM_GET_DRIVER(rockchip_efuse), &dev);
Philipp Tomsich9415b9a2017-05-05 19:21:39 +0200115 if (ret) {
116 debug("%s: could not find efuse device\n", __func__);
117 return;
118 }
119
120 /* read the cpu_id range from the efuses */
Kever Yang26722332017-07-27 19:59:03 +0800121 ret = misc_read(dev, cpuid_offset, &cpuid, sizeof(cpuid));
Philipp Tomsich9415b9a2017-05-05 19:21:39 +0200122 if (ret) {
123 debug("%s: reading cpuid from the efuses failed\n",
124 __func__);
125 return;
126 }
127
128 memset(cpuid_str, 0, sizeof(cpuid_str));
129 for (i = 0; i < 16; i++)
130 sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
131
132 debug("cpuid: %s\n", cpuid_str);
133
134 /*
135 * Mix the cpuid bytes using the same rules as in
136 * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
137 */
138 for (i = 0; i < 8; i++) {
139 low[i] = cpuid[1 + (i << 1)];
140 high[i] = cpuid[i << 1];
141 }
142
143 serialno = crc32_no_comp(0, low, 8);
144 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
145 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
146
Simon Glass382bee52017-08-03 12:22:09 -0600147 env_set("cpuid#", cpuid_str);
148 env_set("serial#", serialno_str);
Philipp Tomsich9415b9a2017-05-05 19:21:39 +0200149#endif
150
151 return;
152}
153
154int misc_init_r(void)
155{
156 setup_serial();
Klaus Goger8adc9d12017-05-05 19:21:40 +0200157 setup_macaddr();
Philipp Tomsich9415b9a2017-05-05 19:21:39 +0200158
159 return 0;
160}
161
162#ifdef CONFIG_SERIAL_TAG
163void get_board_serial(struct tag_serialnr *serialnr)
164{
165 char *serial_string;
166 u64 serial = 0;
167
168 serial_string = getenv("serial#");
169
170 if (serial_string)
171 serial = simple_strtoull(serial_string, NULL, 16);
172
173 serialnr->high = (u32)(serial >> 32);
174 serialnr->low = (u32)(serial & 0xffffffff);
175}
176#endif