Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Configuration settings for the SAMA5D3 Xplained board. |
| 3 | * |
| 4 | * Copyright (C) 2014 Atmel Corporation |
| 5 | * Bo Shen <voice.shen@atmel.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
Wu, Josh | b2d387b | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 13 | /* No NOR flash, this definition should put before common header */ |
| 14 | #define CONFIG_SYS_NO_FLASH |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 15 | |
Wu, Josh | b2d387b | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 16 | #include "at91-sama5_common.h" |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 17 | |
| 18 | /* serial console */ |
| 19 | #define CONFIG_ATMEL_USART |
| 20 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 21 | #define CONFIG_USART_ID ATMEL_ID_DBGU |
| 22 | |
| 23 | /* |
| 24 | * This needs to be defined for the OHCI code to work but it is defined as |
| 25 | * ATMEL_ID_UHPHS in the CPU specific header files. |
| 26 | */ |
| 27 | #define ATMEL_ID_UHP ATMEL_ID_UHPHS |
| 28 | |
| 29 | /* |
| 30 | * Specify the clock enable bit in the PMC_SCER register. |
| 31 | */ |
| 32 | #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP |
| 33 | |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 34 | /* SDRAM */ |
| 35 | #define CONFIG_NR_DRAM_BANKS 1 |
| 36 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS |
| 37 | #define CONFIG_SYS_SDRAM_SIZE 0x10000000 |
| 38 | |
Bo Shen | cd23aac4 | 2014-03-19 14:48:45 +0800 | [diff] [blame] | 39 | #ifdef CONFIG_SPL_BUILD |
| 40 | #define CONFIG_SYS_INIT_SP_ADDR 0x310000 |
| 41 | #else |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 42 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 43 | (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) |
Bo Shen | cd23aac4 | 2014-03-19 14:48:45 +0800 | [diff] [blame] | 44 | #endif |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 45 | |
| 46 | /* NAND flash */ |
| 47 | #define CONFIG_CMD_NAND |
| 48 | |
| 49 | #ifdef CONFIG_CMD_NAND |
| 50 | #define CONFIG_NAND_ATMEL |
| 51 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 52 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 53 | /* our ALE is AD21 */ |
| 54 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 55 | /* our CLE is AD22 */ |
| 56 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 57 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 58 | /* PMECC & PMERRLOC */ |
| 59 | #define CONFIG_ATMEL_NAND_HWECC |
| 60 | #define CONFIG_ATMEL_NAND_HW_PMECC |
| 61 | #define CONFIG_PMECC_CAP 4 |
| 62 | #define CONFIG_PMECC_SECTOR_SIZE 512 |
| 63 | #define CONFIG_CMD_NAND_TRIMFFS |
| 64 | #define CONFIG_CMD_MTDPARTS |
| 65 | |
| 66 | #define CONFIG_MTD_DEVICE |
| 67 | #define CONFIG_MTD_PARTITIONS |
| 68 | #define CONFIG_RBTREE |
| 69 | #define CONFIG_LZO |
| 70 | #define CONFIG_CMD_UBI |
| 71 | #define CONFIG_CMD_UBIFS |
| 72 | #endif |
| 73 | |
| 74 | /* Ethernet Hardware */ |
| 75 | #define CONFIG_MACB |
| 76 | #define CONFIG_RMII |
| 77 | #define CONFIG_NET_MULTI |
| 78 | #define CONFIG_NET_RETRY_COUNT 20 |
| 79 | #define CONFIG_MACB_SEARCH_PHY |
| 80 | #define CONFIG_RGMII |
| 81 | #define CONFIG_CMD_MII |
| 82 | #define CONFIG_PHYLIB |
| 83 | |
| 84 | /* MMC */ |
| 85 | #define CONFIG_CMD_MMC |
| 86 | |
| 87 | #ifdef CONFIG_CMD_MMC |
| 88 | #define CONFIG_MMC |
| 89 | #define CONFIG_GENERIC_MMC |
| 90 | #define CONFIG_GENERIC_ATMEL_MCI |
| 91 | #define CONFIG_ATMEL_MCI_8BIT |
| 92 | #endif |
| 93 | |
| 94 | /* USB */ |
| 95 | #define CONFIG_CMD_USB |
| 96 | |
| 97 | #ifdef CONFIG_CMD_USB |
| 98 | #define CONFIG_USB_ATMEL |
| 99 | #define CONFIG_USB_ATMEL_CLK_SEL_UPLL |
| 100 | #define CONFIG_USB_OHCI_NEW |
| 101 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 102 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI |
| 103 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained" |
| 104 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
| 105 | #define CONFIG_DOS_PARTITION |
| 106 | #define CONFIG_USB_STORAGE |
| 107 | #endif |
| 108 | |
| 109 | #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) |
| 110 | #define CONFIG_CMD_FAT |
| 111 | #define CONFIG_FAT_WRITE |
| 112 | #define CONFIG_CMD_EXT4 |
| 113 | #define CONFIG_CMD_EXT4_WRITE |
| 114 | #endif |
| 115 | |
| 116 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| 117 | |
| 118 | #if CONFIG_SYS_USE_NANDFLASH |
| 119 | /* bootstrap + u-boot + env in nandflash */ |
| 120 | #define CONFIG_ENV_IS_IN_NAND |
| 121 | #define CONFIG_ENV_OFFSET 0xc0000 |
| 122 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 |
| 123 | #define CONFIG_ENV_SIZE 0x20000 |
| 124 | #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ |
| 125 | "nand read 0x22000000 0x200000 0x600000;" \ |
| 126 | "bootz 0x22000000 - 0x21000000" |
| 127 | #elif CONFIG_SYS_USE_MMC |
| 128 | /* bootstrap + u-boot + env in sd card */ |
Wu, Josh | c381440 | 2015-01-20 10:33:31 +0800 | [diff] [blame] | 129 | #define CONFIG_ENV_IS_IN_FAT |
| 130 | #define FAT_ENV_INTERFACE "mmc" |
| 131 | #define FAT_ENV_FILE "uboot.env" |
| 132 | #define FAT_ENV_DEVICE_AND_PART "0" |
| 133 | #define CONFIG_ENV_SIZE 0x4000 |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 134 | #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d3_xplained.dtb; " \ |
| 135 | "fatload mmc 0:1 0x22000000 zImage; " \ |
| 136 | "bootz 0x22000000 - 0x21000000" |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 137 | #else |
| 138 | #define CONFIG_ENV_IS_NOWHERE |
| 139 | #endif |
| 140 | |
Bo Shen | cd23aac4 | 2014-03-19 14:48:45 +0800 | [diff] [blame] | 141 | /* SPL */ |
Bo Shen | cd23aac4 | 2014-03-19 14:48:45 +0800 | [diff] [blame] | 142 | #define CONFIG_SPL_FRAMEWORK |
| 143 | #define CONFIG_SPL_TEXT_BASE 0x300000 |
| 144 | #define CONFIG_SPL_MAX_SIZE 0x10000 |
| 145 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 146 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 147 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 |
| 148 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 149 | |
| 150 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 151 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| 152 | #define CONFIG_SPL_GPIO_SUPPORT |
| 153 | #define CONFIG_SPL_SERIAL_SUPPORT |
| 154 | |
| 155 | #define CONFIG_SPL_BOARD_INIT |
| 156 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 157 | |
| 158 | #ifdef CONFIG_SYS_USE_MMC |
Bo Shen | 993ea97 | 2015-03-04 13:32:57 +0800 | [diff] [blame] | 159 | #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds |
Bo Shen | cd23aac4 | 2014-03-19 14:48:45 +0800 | [diff] [blame] | 160 | #define CONFIG_SPL_MMC_SUPPORT |
| 161 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 |
| 162 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 |
Paul Kocialkowski | e2ccdf8 | 2014-11-08 23:14:55 +0100 | [diff] [blame] | 163 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
Guillaume GARDET | 205b4f3 | 2014-10-15 17:53:11 +0200 | [diff] [blame] | 164 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Bo Shen | cd23aac4 | 2014-03-19 14:48:45 +0800 | [diff] [blame] | 165 | #define CONFIG_SPL_FAT_SUPPORT |
| 166 | #define CONFIG_SPL_LIBDISK_SUPPORT |
| 167 | |
| 168 | #elif CONFIG_SYS_USE_NANDFLASH |
| 169 | #define CONFIG_SPL_NAND_SUPPORT |
| 170 | #define CONFIG_SPL_NAND_DRIVERS |
| 171 | #define CONFIG_SPL_NAND_BASE |
| 172 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 |
| 173 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 174 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 |
| 175 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 176 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 177 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 |
| 178 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 |
Wu, Josh | 05a4d54 | 2014-11-19 19:03:00 +0800 | [diff] [blame] | 179 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER |
Bo Shen | cd23aac4 | 2014-03-19 14:48:45 +0800 | [diff] [blame] | 180 | |
| 181 | #endif |
| 182 | |
Bo Shen | 7ca6f36 | 2014-02-09 15:52:39 +0800 | [diff] [blame] | 183 | #endif |