| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y |
| 3 | CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y |
| 4 | CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y |
| 5 | # CONFIG_SPL_SYS_THUMB_BUILD is not set |
| 6 | # CONFIG_TPL_SYS_THUMB_BUILD is not set |
| 7 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
| 8 | # CONFIG_SPL_USE_ARCH_MEMSET is not set |
| 9 | CONFIG_ARCH_ROCKCHIP=y |
| Simon Glass | 9846390 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 10 | CONFIG_TEXT_BASE=0x60408000 |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 11 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 12 | CONFIG_NR_DRAM_BANKS=1 |
| Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame^] | 13 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 14 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x78000000 |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 15 | CONFIG_ENV_SIZE=0x8000 |
| 16 | CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808" |
| 17 | CONFIG_SPL_TEXT_BASE=0x60000000 |
| Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame^] | 18 | CONFIG_DM_RESET=y |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 19 | CONFIG_ROCKCHIP_RK3066=y |
| 20 | # CONFIG_ROCKCHIP_STIMER is not set |
| 21 | CONFIG_TPL_TEXT_BASE=0x10080C04 |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 22 | CONFIG_TPL_STACK=0x1008FFFF |
| 23 | CONFIG_TARGET_MK808=y |
| 24 | CONFIG_SPL_STACK_R_ADDR=0x70000000 |
| Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame^] | 25 | CONFIG_SPL_STACK=0x1008ffff |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 26 | CONFIG_DEBUG_UART_BASE=0x20064000 |
| 27 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 28 | CONFIG_SPL_FS_FAT=y |
| 29 | CONFIG_SYS_LOAD_ADDR=0x70800800 |
| Tom Rini | 0fc5c49 | 2022-07-25 17:19:18 -0400 | [diff] [blame] | 30 | CONFIG_TPL_MAX_SIZE=0x7ffc |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 31 | CONFIG_SPL_PAYLOAD="u-boot.bin" |
| 32 | CONFIG_DEBUG_UART=y |
| 33 | CONFIG_SD_BOOT=y |
| 34 | CONFIG_USE_PREBOOT=y |
| 35 | CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb" |
| 36 | # CONFIG_DISPLAY_CPUINFO is not set |
| 37 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 38 | CONFIG_BOARD_LATE_INIT=y |
| Tom Rini | ca8a329 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 39 | CONFIG_SPL_MAX_SIZE=0x32000 |
| 40 | CONFIG_SPL_PAD_TO=0x7f8000 |
| Tom Rini | 9b5f9ae | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 41 | CONFIG_SPL_NO_BSS_LIMIT=y |
| Tom Rini | f113d7d | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 42 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 43 | CONFIG_SPL_STACK_R=y |
| 44 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 |
| 45 | CONFIG_SPL_SEPARATE_BSS=y |
| 46 | CONFIG_SPL_FS_EXT4=y |
| 47 | CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2 |
| 48 | CONFIG_TPL_NEEDS_SEPARATE_STACK=y |
| Tom Rini | d31466b | 2022-05-11 18:01:06 -0400 | [diff] [blame] | 49 | CONFIG_SYS_CBSIZE=256 |
| Tom Rini | d0ee7f2 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 50 | CONFIG_SYS_PBSIZE=276 |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 51 | # CONFIG_BOOTM_PLAN9 is not set |
| 52 | # CONFIG_BOOTM_RTEMS is not set |
| 53 | # CONFIG_BOOTM_VXWORKS is not set |
| 54 | CONFIG_CMD_GPT=y |
| 55 | CONFIG_CMD_MMC=y |
| 56 | # CONFIG_CMD_SETEXPR is not set |
| 57 | CONFIG_CMD_CACHE=y |
| 58 | CONFIG_CMD_TIME=y |
| 59 | CONFIG_CMD_REGULATOR=y |
| 60 | CONFIG_SPL_OF_CONTROL=y |
| 61 | CONFIG_TPL_OF_CONTROL=y |
| 62 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 63 | CONFIG_OF_DTB_PROPS_REMOVE=y |
| 64 | CONFIG_SPL_OF_PLATDATA=y |
| 65 | CONFIG_TPL_OF_PLATDATA=y |
| 66 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 67 | # CONFIG_NET is not set |
| 68 | CONFIG_TPL_DM=y |
| 69 | # CONFIG_DM_WARN is not set |
| 70 | CONFIG_REGMAP=y |
| 71 | CONFIG_SPL_REGMAP=y |
| 72 | CONFIG_TPL_REGMAP=y |
| 73 | CONFIG_SYSCON=y |
| 74 | CONFIG_SPL_SYSCON=y |
| 75 | CONFIG_TPL_SYSCON=y |
| 76 | # CONFIG_SIMPLE_BUS is not set |
| 77 | # CONFIG_SPL_SIMPLE_BUS is not set |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 78 | CONFIG_CLK=y |
| 79 | CONFIG_SPL_CLK=y |
| 80 | CONFIG_TPL_CLK=y |
| 81 | CONFIG_ROCKCHIP_GPIO=y |
| 82 | # CONFIG_SPL_DM_I2C is not set |
| 83 | CONFIG_LED=y |
| 84 | CONFIG_LED_GPIO=y |
| 85 | CONFIG_MMC_IO_VOLTAGE=y |
| 86 | CONFIG_SPL_MMC_IO_VOLTAGE=y |
| 87 | CONFIG_MMC_UHS_SUPPORT=y |
| 88 | CONFIG_SPL_MMC_UHS_SUPPORT=y |
| 89 | CONFIG_MMC_DW=y |
| 90 | CONFIG_MMC_DW_ROCKCHIP=y |
| 91 | CONFIG_SF_DEFAULT_SPEED=20000000 |
| 92 | CONFIG_PINCTRL=y |
| 93 | CONFIG_DM_PMIC=y |
| 94 | # CONFIG_SPL_PMIC_CHILDREN is not set |
| 95 | CONFIG_DM_REGULATOR_FIXED=y |
| 96 | CONFIG_DM_REGULATOR_GPIO=y |
| 97 | CONFIG_RAM=y |
| 98 | CONFIG_SPL_RAM=y |
| 99 | CONFIG_TPL_RAM=y |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 100 | # CONFIG_REQUIRE_SERIAL_CONSOLE is not set |
| 101 | CONFIG_DEBUG_UART_SHIFT=2 |
| Tom Rini | 9591b63 | 2022-12-04 09:39:03 -0500 | [diff] [blame] | 102 | CONFIG_SYS_NS16550_MEM32=y |
| Johan Jonker | ccd8ab3 | 2022-04-16 17:09:49 +0200 | [diff] [blame] | 103 | CONFIG_ROCKCHIP_SERIAL=y |
| 104 | CONFIG_SYSRESET=y |
| 105 | CONFIG_TIMER=y |
| 106 | CONFIG_SPL_TIMER=y |
| 107 | CONFIG_TPL_TIMER=y |
| 108 | CONFIG_DESIGNWARE_APB_TIMER=y |
| 109 | CONFIG_SPL_TINY_MEMSET=y |
| 110 | CONFIG_ERRNO_STR=y |
| 111 | # CONFIG_TPL_OF_LIBFDT is not set |