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wdenkc6097192002-11-03 00:24:07 +00001/*
wdenk414eec32005-04-02 22:37:54 +00002 * (C) Copyright 2002-2005
wdenkc6097192002-11-03 00:24:07 +00003 * Gary Jennejohn <gj@denx.de>
4 *
5 * Configuation settings for the TRAB board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
wdenkb2001f22003-12-20 22:45:10 +000029/*
30 * Default configuration is with 8 MB Flash, 32 MB RAM
31 */
32#if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB))
33# define CONFIG_FLASH_8MB /* 8 MB Flash */
wdenkb0639ca2003-09-17 22:48:07 +000034#endif
wdenkb2001f22003-12-20 22:45:10 +000035#if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB))
36# define CONFIG_RAM_32MB /* 32 MB SDRAM */
37#endif
wdenkb0639ca2003-09-17 22:48:07 +000038
wdenkc6097192002-11-03 00:24:07 +000039/*
wdenkc6097192002-11-03 00:24:07 +000040 * High Level Configuration Options
41 * (easy to change)
42 */
43#define CONFIG_ARM920T 1 /* This is an arm920t CPU */
wdenk6dff5522003-07-15 07:45:49 +000044#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
45#define CONFIG_TRAB 1 /* on a TRAB Board */
46#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
wdenk149dded2003-09-10 18:20:28 +000047#define LITTLEENDIAN 1 /* used by usb_ohci.c */
wdenkc6097192002-11-03 00:24:07 +000048
wdenkf54ebdf2003-09-17 15:10:32 +000049/* automatic software updates (see board/trab/auto_update.c) */
50#define CONFIG_AUTO_UPDATE 1
51
wdenkc6097192002-11-03 00:24:07 +000052/* input clock of PLL */
wdenk7f6c2cb2002-11-10 22:06:23 +000053#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
wdenkc6097192002-11-03 00:24:07 +000054
55#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
56
57#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58#define CONFIG_SETUP_MEMORY_TAGS 1
59#define CONFIG_INITRD_TAG 1
60
wdenkf72da342003-10-10 10:05:42 +000061#define CFG_DEVICE_NULLDEV 1 /* enble null device */
62#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
wdenk6dff5522003-07-15 07:45:49 +000063
wdenka0f2fe52003-10-28 09:14:21 +000064#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
65
wdenk6dff5522003-07-15 07:45:49 +000066/***********************************************************
67 * I2C stuff:
68 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
69 * address 0x54 with 8bit addressing
70 ***********************************************************/
71#define CONFIG_HARD_I2C /* I2C with hardware support */
72#define CFG_I2C_SPEED 100000 /* I2C speed */
73#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
74
75#define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
76#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
77
78#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
79#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
80#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
81
wdenk149dded2003-09-10 18:20:28 +000082/* USB stuff */
83#define CONFIG_USB_OHCI 1
84#define CONFIG_USB_STORAGE 1
85#define CONFIG_DOS_PARTITION 1
86
wdenkc6097192002-11-03 00:24:07 +000087/*
88 * Size of malloc() pool
89 */
wdenk699b13a2002-11-03 18:03:52 +000090#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
wdenka8c7c702003-12-06 19:49:23 +000091#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenkc6097192002-11-03 00:24:07 +000092
93/*
94 * Hardware drivers
95 */
96#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
97#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
98#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
99
wdenk6dff5522003-07-15 07:45:49 +0000100#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
101
wdenkc6097192002-11-03 00:24:07 +0000102#define CONFIG_VFD 1 /* VFD linear frame buffer driver */
103#define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
104
105/*
106 * select serial console configuration
107 */
wdenk6dff5522003-07-15 07:45:49 +0000108#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
wdenkc6097192002-11-03 00:24:07 +0000109
110#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
111
112#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
113
114#define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
115
116/*
117 * The following enables modem debugging stuff. The dbg() and
118 * 'char screen[1024]' are used for debug printfs. Unfortunately,
119 * it is usable only from BDI
120 */
121#undef CONFIG_MODEM_SUPPORT_DEBUG
122
123/* allow to overwrite serial and ethaddr */
124#define CONFIG_ENV_OVERWRITE
125
126#define CONFIG_BAUDRATE 115200
127
128#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
129
wdenk48b42612003-06-19 23:01:32 +0000130/* Use s3c2400's RTC */
131#define CONFIG_RTC_S3C24X0 1
132
wdenkc6097192002-11-03 00:24:07 +0000133#ifdef CONFIG_HWFLOW
134#define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
135#else
136#define CONFIG_COMMANDS_ADD_HWFLOW 0
137#endif
138
139#ifdef CONFIG_VFD
140#define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
141#else
142#define CONFIG_COMMANDS_ADD_VFD 0
143#endif
144
wdenk6dff5522003-07-15 07:45:49 +0000145#ifdef CONFIG_DRIVER_S3C24X0_I2C
146#define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
147#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
148#else
149#define CONFIG_COMMANDS_ADD_EEPROM 0
150#define CONFIG_COMMANDS_I2C 0
151#endif
152
wdenkc6097192002-11-03 00:24:07 +0000153#ifndef USE_920T_MMU
wdenk414eec32005-04-02 22:37:54 +0000154#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
155 CONFIG_COMMANDS_ADD_HWFLOW | \
156 CONFIG_COMMANDS_ADD_VFD | \
157 CONFIG_COMMANDS_ADD_EEPROM | \
158 CONFIG_COMMANDS_I2C | \
159 CFG_CMD_BSP | \
160 CFG_CMD_DATE | \
161 CFG_CMD_DHCP | \
wdenk414eec32005-04-02 22:37:54 +0000162 CFG_CMD_FAT | \
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200163 CFG_CMD_JFFS2 | \
wdenk414eec32005-04-02 22:37:54 +0000164 CFG_CMD_NFS | \
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200165 CFG_CMD_SNTP | \
166 CFG_CMD_USB )
wdenkc6097192002-11-03 00:24:07 +0000167#else
wdenk414eec32005-04-02 22:37:54 +0000168#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
169 CONFIG_COMMANDS_ADD_HWFLOW | \
170 CONFIG_COMMANDS_ADD_VFD | \
171 CONFIG_COMMANDS_ADD_EEPROM | \
172 CONFIG_COMMANDS_I2C | \
173 CFG_CMD_BSP | \
174 CFG_CMD_DATE | \
175 CFG_CMD_DHCP | \
wdenk414eec32005-04-02 22:37:54 +0000176 CFG_CMD_FAT | \
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200177 CFG_CMD_JFFS2 | \
wdenk414eec32005-04-02 22:37:54 +0000178 CFG_CMD_NFS | \
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200179 CFG_CMD_SNTP | \
180 CFG_CMD_USB )
wdenkc6097192002-11-03 00:24:07 +0000181#endif
182
wdenk149dded2003-09-10 18:20:28 +0000183/* moved up */
184#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
185
wdenkc6097192002-11-03 00:24:07 +0000186/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
187#include <cmd_confdefs.h>
188
wdenkc6097192002-11-03 00:24:07 +0000189#define CONFIG_BOOTDELAY 5
wdenkc8c3a8b2003-05-21 20:26:20 +0000190#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
wdenkc6097192002-11-03 00:24:07 +0000191#define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
wdenk6dff5522003-07-15 07:45:49 +0000192#define CONFIG_BOOTARGS "console=ttyS0"
193#define CONFIG_NETMASK 255.255.0.0
wdenk6069ff22003-02-28 00:49:47 +0000194#define CONFIG_IPADDR 192.168.3.68
wdenk43d96162003-03-06 00:02:04 +0000195#define CONFIG_HOSTNAME trab
wdenkc6097192002-11-03 00:24:07 +0000196#define CONFIG_SERVERIP 192.168.3.1
wdenka0ff7f22003-10-09 13:16:55 +0000197#define CONFIG_BOOTCOMMAND "burn_in"
wdenk47cd00f2003-03-06 13:39:27 +0000198
wdenkb0639ca2003-09-17 22:48:07 +0000199#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
wdenk149dded2003-09-10 18:20:28 +0000200#ifdef CFG_HUSH_PARSER
201#define CONFIG_EXTRA_ENV_SETTINGS \
202 "nfs_args=setenv bootargs root=/dev/nfs rw " \
203 "nfsroot=$serverip:$rootpath\0" \
204 "rootpath=/opt/eldk/arm_920TDI\0" \
205 "ram_args=setenv bootargs root=/dev/ram rw\0" \
206 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
207 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
208 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000209 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
210 "load=tftp C100000 ${u-boot}\0" \
211 "update=protect off 0 5FFFF;era 0 5FFFF;" \
212 "cp.b C100000 0 $filesize\0" \
wdenk149dded2003-09-10 18:20:28 +0000213 "loadfile=/tftpboot/TRAB/uImage\0" \
214 "loadaddr=c400000\0" \
215 "net_load=tftpboot $loadaddr $loadfile\0" \
216 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenk4654af22003-10-22 09:00:28 +0000217 "kernel_addr=00060000\0" \
wdenk149dded2003-09-10 18:20:28 +0000218 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
219 "mdm_init1=ATZ\0" \
220 "mdm_init2=ATS0=1\0" \
221 "mdm_flow_control=rts/cts\0"
222#else /* !CFG_HUSH_PARSER */
wdenkc6097192002-11-03 00:24:07 +0000223#define CONFIG_EXTRA_ENV_SETTINGS \
224 "nfs_args=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100225 "nfsroot=${serverip}:${rootpath}\0" \
wdenkc6097192002-11-03 00:24:07 +0000226 "rootpath=/opt/eldk/arm_920TDI\0" \
227 "ram_args=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100228 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
229 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
230 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000231 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100232 "load=tftp C100000 ${u-boot}\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000233 "update=protect off 0 5FFFF;era 0 5FFFF;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100234 "cp.b C100000 0 ${filesize}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000235 "loadfile=/tftpboot/TRAB/uImage\0" \
wdenkc6097192002-11-03 00:24:07 +0000236 "loadaddr=c400000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100237 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
wdenkc6097192002-11-03 00:24:07 +0000238 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000239 "kernel_addr=000C0000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100240 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
wdenkc6097192002-11-03 00:24:07 +0000241 "mdm_init1=ATZ\0" \
242 "mdm_init2=ATS0=1\0" \
243 "mdm_flow_control=rts/cts\0"
wdenkf54ebdf2003-09-17 15:10:32 +0000244#endif /* CFG_HUSH_PARSER */
wdenkb0639ca2003-09-17 22:48:07 +0000245#else /* CONFIG_FLASH_8MB => 8 MB flash */
wdenk149dded2003-09-10 18:20:28 +0000246#ifdef CFG_HUSH_PARSER
247#define CONFIG_EXTRA_ENV_SETTINGS \
248 "nfs_args=setenv bootargs root=/dev/nfs rw " \
249 "nfsroot=$serverip:$rootpath\0" \
250 "rootpath=/opt/eldk/arm_920TDI\0" \
251 "ram_args=setenv bootargs root=/dev/ram rw\0" \
252 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
253 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
254 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
wdenkefa329c2004-03-23 20:18:25 +0000255 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000256 "load=tftp C100000 ${u-boot}\0" \
257 "update=protect off 0 3FFFF;era 0 3FFFF;" \
258 "cp.b C100000 0 $filesize;" \
259 "setenv filesize;saveenv\0" \
wdenk149dded2003-09-10 18:20:28 +0000260 "loadfile=/tftpboot/TRAB/uImage\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000261 "loadaddr=C400000\0" \
wdenk149dded2003-09-10 18:20:28 +0000262 "net_load=tftpboot $loadaddr $loadfile\0" \
263 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000264 "kernel_addr=000C0000\0" \
wdenk149dded2003-09-10 18:20:28 +0000265 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
266 "mdm_init1=ATZ\0" \
267 "mdm_init2=ATS0=1\0" \
268 "mdm_flow_control=rts/cts\0"
269#else /* !CFG_HUSH_PARSER */
wdenk47cd00f2003-03-06 13:39:27 +0000270#define CONFIG_EXTRA_ENV_SETTINGS \
271 "nfs_args=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100272 "nfsroot=${serverip}:${rootpath}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000273 "rootpath=/opt/eldk/arm_920TDI\0" \
274 "ram_args=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100275 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
276 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
277 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
wdenkefa329c2004-03-23 20:18:25 +0000278 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100279 "load=tftp C100000 ${u-boot}\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000280 "update=protect off 0 3FFFF;era 0 3FFFF;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100281 "cp.b C100000 0 ${filesize};" \
wdenkf54ebdf2003-09-17 15:10:32 +0000282 "setenv filesize;saveenv\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000283 "loadfile=/tftpboot/TRAB/uImage\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000284 "loadaddr=C400000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100285 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000286 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000287 "kernel_addr=000C0000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100288 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000289 "mdm_init1=ATZ\0" \
290 "mdm_init2=ATS0=1\0" \
291 "mdm_flow_control=rts/cts\0"
wdenk149dded2003-09-10 18:20:28 +0000292#endif /* CFG_HUSH_PARSER */
wdenkb0639ca2003-09-17 22:48:07 +0000293#endif /* CONFIG_FLASH_8MB */
wdenkc6097192002-11-03 00:24:07 +0000294
wdenk151ab832005-02-24 22:44:16 +0000295#if 1 /* feel free to disable for development */
wdenkc6097192002-11-03 00:24:07 +0000296#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
297#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
wdenk151ab832005-02-24 22:44:16 +0000298#define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
wdenkc6097192002-11-03 00:24:07 +0000299#endif
300
301#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
302#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
303/* what's this ? it's not used anywhere */
304#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
305#endif
306
307/*
308 * Miscellaneous configurable options
309 */
310#define CFG_LONGHELP /* undef to save memory */
311#define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
wdenk6dff5522003-07-15 07:45:49 +0000312#ifdef CFG_HUSH_PARSER
313#define CFG_PROMPT_HUSH_PS2 "> "
314#endif
315
wdenkc6097192002-11-03 00:24:07 +0000316#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
317#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
318#define CFG_MAXARGS 16 /* max number of command args */
319#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
320
wdenkf54ebdf2003-09-17 15:10:32 +0000321#define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
322#define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
wdenkc6097192002-11-03 00:24:07 +0000323
wdenk6dff5522003-07-15 07:45:49 +0000324#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
wdenkc6097192002-11-03 00:24:07 +0000325
wdenkf54ebdf2003-09-17 15:10:32 +0000326#define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
wdenkc6097192002-11-03 00:24:07 +0000327
328#ifdef CONFIG_TRAB_50MHZ
329/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
330/* it to wrap 100 times (total 1562500) to get 1 sec. */
331/* this should _really_ be calculated !! */
332#define CFG_HZ 1562500
333#else
334/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
335/* it to wrap 100 times (total 1039000) to get 1 sec. */
336/* this should _really_ be calculated !! */
337#define CFG_HZ 1039000
338#endif
339
340/* valid baudrates */
341#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
342
343#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
344
345/*-----------------------------------------------------------------------
wdenka0ff7f22003-10-09 13:16:55 +0000346 * burn-in test stuff.
wdenk42d1f032003-10-15 23:53:47 +0000347 *
wdenka0ff7f22003-10-09 13:16:55 +0000348 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
349 * Because the burn-in test itself causes also an delay of about 4 seconds,
350 * this time must be subtracted from the desired overall burn-in cycle time.
wdenk4f7cb082003-09-11 23:06:34 +0000351 */
wdenka0ff7f22003-10-09 13:16:55 +0000352#define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
wdenk4f7cb082003-09-11 23:06:34 +0000353
354/*-----------------------------------------------------------------------
wdenkc6097192002-11-03 00:24:07 +0000355 * Stack sizes
356 *
357 * The stack sizes are set up in start.S using the settings below
358 */
359#define CONFIG_STACKSIZE (128*1024) /* regular stack */
360#ifdef CONFIG_USE_IRQ
361#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
362#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
363#endif
364
365/*-----------------------------------------------------------------------
366 * Physical Memory Map
367 */
wdenk6dff5522003-07-15 07:45:49 +0000368#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
wdenkf54ebdf2003-09-17 15:10:32 +0000369#define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
wdenkb0639ca2003-09-17 22:48:07 +0000370#ifndef CONFIG_RAM_16MB
wdenkf54ebdf2003-09-17 15:10:32 +0000371#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
372#else
wdenk6dff5522003-07-15 07:45:49 +0000373#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
wdenkf54ebdf2003-09-17 15:10:32 +0000374#endif
wdenkc6097192002-11-03 00:24:07 +0000375
wdenk6dff5522003-07-15 07:45:49 +0000376#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
wdenkc6097192002-11-03 00:24:07 +0000377
378/* The following #defines are needed to get flash environment right */
wdenk6069ff22003-02-28 00:49:47 +0000379#define CFG_MONITOR_BASE CFG_FLASH_BASE
wdenkc6097192002-11-03 00:24:07 +0000380#define CFG_MONITOR_LEN (256 << 10)
381
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200382/* Dynamic MTD partition support */
383#define CONFIG_JFFS2_CMDLINE
384#define MTDIDS_DEFAULT "nor0=0"
385
386/* production flash layout */
387#define MTDPARTS_DEFAULT "mtdparts=0:32k(Firmware1)ro," \
388 "16k(Env1)," \
389 "16k(Env2)," \
390 "320k(Firmware2)ro," \
391 "896k(Kernel)," \
392 "5376k(Root-FS)," \
393 "1408k(JFFS2)," \
394 "-(VFD)"
395
wdenkc6097192002-11-03 00:24:07 +0000396/*-----------------------------------------------------------------------
397 * FLASH and environment organization
398 */
399#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
wdenkb0639ca2003-09-17 22:48:07 +0000400#ifndef CONFIG_FLASH_8MB
wdenk6069ff22003-02-28 00:49:47 +0000401#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
wdenkf54ebdf2003-09-17 15:10:32 +0000402#else
403#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
wdenk43d96162003-03-06 00:02:04 +0000404#endif
wdenkc6097192002-11-03 00:24:07 +0000405
406/* timeout values are in ticks */
407#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
408#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
409
410#define CFG_ENV_IS_IN_FLASH 1
411
412/* Address and size of Primary Environment Sector */
wdenkb0639ca2003-09-17 22:48:07 +0000413#ifndef CONFIG_FLASH_8MB
wdenkf54ebdf2003-09-17 15:10:32 +0000414#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
415#define CFG_ENV_SIZE 0x4000
416#define CFG_ENV_SECT_SIZE 0x20000
417#else
Wolfgang Denkfb34a9a2005-09-26 23:40:37 +0200418#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
wdenkc6097192002-11-03 00:24:07 +0000419#define CFG_ENV_SIZE 0x4000
wdenk43d96162003-03-06 00:02:04 +0000420#define CFG_ENV_SECT_SIZE 0x4000
wdenk43d96162003-03-06 00:02:04 +0000421#endif
wdenkc6097192002-11-03 00:24:07 +0000422
423/* Address and size of Redundant Environment Sector */
wdenk43d96162003-03-06 00:02:04 +0000424#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
wdenkc6097192002-11-03 00:24:07 +0000425#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
426
wdenk1cb8e982003-03-06 21:55:29 +0000427/* Initial value of the on-board touch screen brightness */
428#define CFG_BRIGHTNESS 0x20
429
wdenkc6097192002-11-03 00:24:07 +0000430#endif /* __CONFIG_H */