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Sascha Hauercaebc952008-03-26 20:41:09 +01001/*
2 * (C) Copyright 2004
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Kshitij Gupta <kshitij@ti.com>
6 *
Magnus Lilja70641222008-04-15 19:09:10 +02007 * Configuration settings for the LogicPD i.MX31 Litekit board.
Sascha Hauercaebc952008-03-26 20:41:09 +01008 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Sascha Hauercaebc952008-03-26 20:41:09 +010010 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
Stefano Babic86271112011-03-14 15:43:56 +010015#include <asm/arch/imx-regs.h>
Magnus Liljae7ae84d2008-04-20 10:36:36 +020016
Sascha Hauercaebc952008-03-26 20:41:09 +010017 /* High Level Configuration Options */
18#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
19#define CONFIG_MX31 1 /* in a mx31 */
Sascha Hauercaebc952008-03-26 20:41:09 +010020#define CONFIG_MX31_CLK32 32000
21
22#define CONFIG_DISPLAY_CPUINFO
23#define CONFIG_DISPLAY_BOARDINFO
24
Fabio Estevamac88e662011-06-06 03:13:36 +000025#define CONFIG_SYS_TEXT_BASE 0xa0000000
26
Fabio Estevam4c414382011-09-22 08:07:17 +000027#define CONFIG_MACH_TYPE MACH_TYPE_MX31LITE
28
Sascha Hauercaebc952008-03-26 20:41:09 +010029/* Temporarily disabled */
30#if 0
31#define CONFIG_OF_LIBFDT 1
32#define CONFIG_FIT 1
33#define CONFIG_FIT_VERBOSE 1
34#endif
35
36#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
37#define CONFIG_SETUP_MEMORY_TAGS 1
38#define CONFIG_INITRD_TAG 1
39
40/*
41 * Size of malloc() pool
42 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
Sascha Hauercaebc952008-03-26 20:41:09 +010044
45/*
46 * Hardware drivers
47 */
48
Stefano Babic40f6fff2011-11-22 15:22:39 +010049#define CONFIG_MXC_UART
50#define CONFIG_MXC_UART_BASE UART1_BASE
Stefano Babic87e14f02011-08-26 11:54:05 +020051#define CONFIG_MXC_GPIO
Sascha Hauercaebc952008-03-26 20:41:09 +010052
Magnus Liljaf9204e12008-04-20 10:38:12 +020053#define CONFIG_HARD_SPI 1
54#define CONFIG_MXC_SPI 1
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020055#define CONFIG_DEFAULT_SPI_BUS 1
Stefano Babic9f481e92010-08-23 20:41:19 +020056#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Magnus Liljaf9204e12008-04-20 10:38:12 +020057
Stefano Babic2672d5d2011-10-08 11:01:52 +020058/* PMIC Controller */
Ɓukasz Majewskibe3b51a2012-11-13 03:22:14 +000059#define CONFIG_POWER
60#define CONFIG_POWER_SPI
61#define CONFIG_POWER_FSL
Stefano Babicdfe5e142010-04-16 17:11:19 +020062#define CONFIG_FSL_PMIC_BUS 1
63#define CONFIG_FSL_PMIC_CS 0
64#define CONFIG_FSL_PMIC_CLK 1000000
Stefano Babic9f481e92010-08-23 20:41:19 +020065#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Stefano Babic2672d5d2011-10-08 11:01:52 +020066#define CONFIG_FSL_PMIC_BITLEN 32
Fabio Estevam4e8b7542011-10-24 06:44:15 +000067#define CONFIG_RTC_MC13XXX
Magnus Liljaf9204e12008-04-20 10:38:12 +020068
Sascha Hauercaebc952008-03-26 20:41:09 +010069/* allow to overwrite serial and ethaddr */
70#define CONFIG_ENV_OVERWRITE
71#define CONFIG_CONS_INDEX 1
72#define CONFIG_BAUDRATE 115200
Sascha Hauercaebc952008-03-26 20:41:09 +010073
74/***********************************************************
75 * Command definition
76 ***********************************************************/
77
78#include <config_cmd_default.h>
79
80#define CONFIG_CMD_MII
81#define CONFIG_CMD_PING
Magnus Liljaf9204e12008-04-20 10:38:12 +020082#define CONFIG_CMD_SPI
83#define CONFIG_CMD_DATE
Magnus Liljaba6adeb2010-04-23 20:30:49 +020084#define CONFIG_CMD_NAND
Sascha Hauercaebc952008-03-26 20:41:09 +010085
86#define CONFIG_BOOTDELAY 3
87
88#define CONFIG_NETMASK 255.255.255.0
89#define CONFIG_IPADDR 192.168.23.168
90#define CONFIG_SERVERIP 192.168.23.2
91
92#define CONFIG_EXTRA_ENV_SETTINGS \
93 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
94 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
95 "bootcmd=run bootcmd_net\0" \
96 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \
97 "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
98
99
Ben Warren736fead2009-07-20 22:01:11 -0700100#define CONFIG_SMC911X 1
101#define CONFIG_SMC911X_BASE (CS4_BASE + 0x00020000)
102#define CONFIG_SMC911X_32_BIT 1
Sascha Hauercaebc952008-03-26 20:41:09 +0100103
104/*
105 * Miscellaneous configurable options
106 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200107#define CONFIG_SYS_LONGHELP /* undef to save memory */
108#define CONFIG_SYS_PROMPT "uboot> "
109#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Sascha Hauercaebc952008-03-26 20:41:09 +0100110/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
112#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
113#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Sascha Hauercaebc952008-03-26 20:41:09 +0100114
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
116#define CONFIG_SYS_MEMTEST_END 0x10000
Sascha Hauercaebc952008-03-26 20:41:09 +0100117
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
Sascha Hauercaebc952008-03-26 20:41:09 +0100119
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_HZ 1000
Sascha Hauercaebc952008-03-26 20:41:09 +0100121
122#define CONFIG_CMDLINE_EDITING 1
123
124/*-----------------------------------------------------------------------
Sascha Hauercaebc952008-03-26 20:41:09 +0100125 * Physical Memory Map
126 */
127#define CONFIG_NR_DRAM_BANKS 1
Magnus Liljae7ae84d2008-04-20 10:36:36 +0200128#define PHYS_SDRAM_1 CSD0_BASE
Sascha Hauercaebc952008-03-26 20:41:09 +0100129#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Fabio Estevam4e377312011-06-05 14:56:02 +0000130#define CONFIG_BOARD_EARLY_INIT_F
Sascha Hauercaebc952008-03-26 20:41:09 +0100131
Fabio Estevam7a5faf02011-09-22 08:07:13 +0000132#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Magnus Lilja68a75d02010-10-16 19:47:06 +0200133#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
Wolfgang Denk553f0982010-10-26 13:32:32 +0200134#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200135#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Magnus Lilja68a75d02010-10-16 19:47:06 +0200136#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
137
Sascha Hauercaebc952008-03-26 20:41:09 +0100138/*-----------------------------------------------------------------------
139 * FLASH and environment organization
140 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_FLASH_BASE CS0_BASE
142#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
143#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
144#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
Sascha Hauercaebc952008-03-26 20:41:09 +0100145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x001f0000)
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200147#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200148#define CONFIG_ENV_SECT_SIZE (64 * 1024)
149#define CONFIG_ENV_SIZE (64 * 1024)
Sascha Hauercaebc952008-03-26 20:41:09 +0100150
151/*-----------------------------------------------------------------------
152 * CFI FLASH driver setup
153 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200155#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
157#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
Sascha Hauercaebc952008-03-26 20:41:09 +0100158
159/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
161#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
Sascha Hauercaebc952008-03-26 20:41:09 +0100162
163/*
164 * JFFS2 partitions
165 */
Stefan Roese68d7d652009-03-19 13:30:36 +0100166#undef CONFIG_CMD_MTDPARTS
Sascha Hauercaebc952008-03-26 20:41:09 +0100167#define CONFIG_JFFS2_DEV "nor0"
168
Magnus Liljaba6adeb2010-04-23 20:30:49 +0200169/*
170 * NAND flash
171 */
172#define CONFIG_NAND_MXC
173#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR
174#define CONFIG_SYS_MAX_NAND_DEVICE 1
175#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
176#define CONFIG_MXC_NAND_HWECC
177
Sascha Hauercaebc952008-03-26 20:41:09 +0100178#endif /* __CONFIG_H */