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Stefan Roese5fb692c2007-01-18 10:25:34 +01001/*
2 * (C) Copyright 2007
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <ppc_asm.tmpl>
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020025#include <asm/mmu.h>
Stefan Roese5fb692c2007-01-18 10:25:34 +010026#include <config.h>
Stefan Roese550650d2010-09-20 16:05:31 +020027#include <asm/ppc4xx.h>
Stefan Roese5fb692c2007-01-18 10:25:34 +010028
Stefan Roese5fb692c2007-01-18 10:25:34 +010029/**************************************************************************
30 * TLB TABLE
31 *
32 * This table is used by the cpu boot code to setup the initial tlb
33 * entries. Rather than make broad assumptions in the cpu source tree,
34 * this table lets each board set things up however they like.
35 *
36 * Pointer to the table is returned in r1
37 *
38 *************************************************************************/
39
40 .section .bootpg,"ax"
41 .globl tlbtab
42
43tlbtab:
44 tlbtab_start
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020045 tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG)
46 tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG)
47 tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX )
48 tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG )
49 tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG )
50 tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG )
Stefan Roese5fb692c2007-01-18 10:25:34 +010051 tlbtab_end