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huang linbe1d5e02015-11-17 14:20:27 +08001/*
2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6#ifndef __CONFIG_RK3036_COMMON_H
7#define __CONFIG_RK3036_COMMON_H
8
Albert ARIBAUD37098442016-01-27 08:46:11 +01009#define CONFIG_SYS_CACHELINE_SIZE 32
10
huang linbe1d5e02015-11-17 14:20:27 +080011#include <asm/arch/hardware.h>
12
13#define CONFIG_SYS_NO_FLASH
14#define CONFIG_NR_DRAM_BANKS 1
15#define CONFIG_ENV_IS_NOWHERE
16#define CONFIG_ENV_SIZE 0x2000
17#define CONFIG_SYS_MAXARGS 16
18#define CONFIG_BAUDRATE 115200
19#define CONFIG_SYS_MALLOC_LEN (32 << 20)
20#define CONFIG_SYS_CBSIZE 1024
21#define CONFIG_SKIP_LOWLEVEL_INIT
22#define CONFIG_SYS_THUMB_BUILD
23#define CONFIG_DISPLAY_BOARDINFO
24
25#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
26#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
27#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
28
Simon Glass9b205192015-12-13 21:37:00 -070029#define CONFIG_SPL_SERIAL_SUPPORT
30
huang linbe1d5e02015-11-17 14:20:27 +080031#define CONFIG_SYS_NS16550
32#define CONFIG_SYS_NS16550_MEM32
33
huang linbe1d5e02015-11-17 14:20:27 +080034#define CONFIG_SYS_TEXT_BASE 0x60000000
35#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
36#define CONFIG_SYS_LOAD_ADDR 0x60800800
37#define CONFIG_SPL_STACK 0x10081fff
38#define CONFIG_SPL_TEXT_BASE 0x10081004
39
40#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
41#define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
42
43#define CONFIG_ROCKCHIP_COMMON
44
45/* MMC/SD IP block */
46#define CONFIG_MMC
47#define CONFIG_GENERIC_MMC
48#define CONFIG_CMD_MMC
49#define CONFIG_SDHCI
50#define CONFIG_DWMMC
51#define CONFIG_BOUNCE_BUFFER
52
53#define CONFIG_DOS_PARTITION
54#define CONFIG_CMD_FAT
55#define CONFIG_FAT_WRITE
56#define CONFIG_CMD_EXT2
57#define CONFIG_CMD_EXT4
58#define CONFIG_CMD_FS_GENERIC
59#define CONFIG_PARTITION_UUIDS
60#define CONFIG_CMD_PART
61
62#define CONFIG_CMD_CACHE
63#define CONFIG_CMD_TIME
64
65#define CONFIG_SYS_SDRAM_BASE 0x60000000
66#define CONFIG_NR_DRAM_BANKS 1
67#define SDRAM_BANK_SIZE (512UL << 20UL)
68
69#define CONFIG_SPI_FLASH
70#define CONFIG_SPI
71#define CONFIG_CMD_SF
72#define CONFIG_CMD_SPI
73#define CONFIG_SPI_FLASH_GIGADEVICE
74#define CONFIG_SF_DEFAULT_SPEED 20000000
75
76#define CONFIG_CMD_I2C
77
78#ifndef CONFIG_SPL_BUILD
79#include <config_distro_defaults.h>
80
81#define ENV_MEM_LAYOUT_SETTINGS \
82 "scriptaddr=0x60000000\0" \
83 "pxefile_addr_r=0x60100000\0" \
84 "fdt_addr_r=0x61f00000\0" \
85 "kernel_addr_r=0x62000000\0" \
86 "ramdisk_addr_r=0x64000000\0"
87
88/* First try to boot from SD (index 0), then eMMC (index 1 */
89#define BOOT_TARGET_DEVICES(func) \
90 func(MMC, mmc, 0) \
91 func(MMC, mmc, 1)
92
93#include <config_distro_bootcmd.h>
94
95/* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
96 * so limit the fdt reallocation to that */
97#define CONFIG_EXTRA_ENV_SETTINGS \
98 "fdt_high=0x7fffffff\0" \
99 ENV_MEM_LAYOUT_SETTINGS \
100 BOOTENV
101#endif
102
103#endif