Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_EXYNOS=y | ||||
Tom Rini | 278b90c | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x23E00000 |
Thomas Abraham | 36aa893 | 2016-04-23 22:18:12 +0530 | [diff] [blame] | 4 | CONFIG_ARCH_EXYNOS5=y |
Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 5 | CONFIG_TARGET_PEACH_PI=y |
Tom Rini | d168bcb | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 6 | CONFIG_NR_DRAM_BANKS=7 |
Tom Rini | c9542ea | 2018-04-07 20:27:54 -0400 | [diff] [blame] | 7 | CONFIG_SPL=y |
Siva Durga Prasad Paladugu | a4d8892 | 2016-07-29 15:31:47 +0530 | [diff] [blame] | 8 | CONFIG_IDENT_STRING=" for Peach-Pi" |
Tom Rini | 3337e3a | 2016-11-29 09:14:57 -0500 | [diff] [blame] | 9 | CONFIG_DISTRO_DEFAULTS=y |
Simon Glass | 73223f0 | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 10 | CONFIG_FIT=y |
11 | CONFIG_FIT_BEST_MATCH=y | ||||
Simon Glass | 98af879 | 2016-10-17 20:12:35 -0600 | [diff] [blame] | 12 | CONFIG_SILENT_CONSOLE=y |
Tom Rini | 75670c8 | 2018-02-06 12:15:38 -0500 | [diff] [blame] | 13 | # CONFIG_SPL_FRAMEWORK is not set |
Simon Goldschmidt | f89d613 | 2018-09-30 14:31:53 +0200 | [diff] [blame^] | 14 | CONFIG_SPL_TEXT_BASE=0x02024410 |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 15 | CONFIG_SYS_PROMPT="Peach-Pi # " |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 16 | CONFIG_CMD_GPIO=y |
17 | CONFIG_CMD_I2C=y | ||||
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 18 | CONFIG_CMD_MMC=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 19 | CONFIG_CMD_SF=y |
20 | CONFIG_CMD_SPI=y | ||||
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 21 | CONFIG_CMD_USB=y |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 22 | # CONFIG_CMD_SETEXPR is not set |
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 23 | CONFIG_CMD_CACHE=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 24 | CONFIG_CMD_TIME=y |
Simon Glass | 93a98a6 | 2018-12-10 10:37:44 -0700 | [diff] [blame] | 25 | CONFIG_CMD_SOUND=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 26 | CONFIG_CMD_PMIC=y |
27 | CONFIG_CMD_REGULATOR=y | ||||
Simon Glass | 26468d5 | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 28 | CONFIG_CMD_TPM=y |
Simon Glass | eddb8cf | 2015-08-22 18:31:43 -0600 | [diff] [blame] | 29 | CONFIG_CMD_TPM_TEST=y |
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 30 | CONFIG_CMD_EXT4_WRITE=y |
Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 31 | CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" |
Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 32 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
Patrick Delaunay | abe66b1 | 2019-02-27 15:20:38 +0100 | [diff] [blame] | 33 | CONFIG_USE_ENV_SPI_BUS=y |
34 | CONFIG_ENV_SPI_BUS=1 | ||||
Simon Glass | cc456bd | 2015-08-03 08:19:23 -0600 | [diff] [blame] | 35 | CONFIG_I2C_CROS_EC_TUNNEL=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 36 | CONFIG_I2C_MUX=y |
37 | CONFIG_I2C_ARB_GPIO_CHALLENGE=y | ||||
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 38 | CONFIG_CROS_EC_KEYB=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 39 | CONFIG_CROS_EC=y |
40 | CONFIG_CROS_EC_SPI=y | ||||
Masahiro Yamada | 55ed3b4 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 41 | CONFIG_MMC_DW=y |
Masahiro Yamada | e1ce61f | 2016-12-07 22:10:28 +0900 | [diff] [blame] | 42 | CONFIG_MMC_SDHCI=y |
Masahiro Yamada | 45a68fe | 2016-12-07 22:10:29 +0900 | [diff] [blame] | 43 | CONFIG_MMC_SDHCI_S5P=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 44 | CONFIG_SPI_FLASH=y |
Patrick Delaunay | 14453fb | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 45 | CONFIG_SF_DEFAULT_MODE=0 |
46 | CONFIG_SF_DEFAULT_SPEED=50000000 | ||||
Bin Meng | 68d5342 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 47 | CONFIG_SPI_FLASH_GIGADEVICE=y |
48 | CONFIG_SPI_FLASH_WINBOND=y | ||||
Adam Ford | 8daec2d | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 49 | CONFIG_SMC911X=y |
50 | CONFIG_SMC911X_BASE=0x5000000 | ||||
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 51 | CONFIG_DM_PMIC=y |
52 | CONFIG_PMIC_TPS65090=y | ||||
53 | CONFIG_DM_REGULATOR=y | ||||
54 | CONFIG_REGULATOR_TPS65090=y | ||||
Simon Glass | bb5930d | 2016-02-21 21:09:01 -0700 | [diff] [blame] | 55 | CONFIG_DM_PWM=y |
56 | CONFIG_PWM_EXYNOS=y | ||||
Simon Glass | d4061aa | 2015-08-03 08:19:28 -0600 | [diff] [blame] | 57 | CONFIG_SOUND=y |
58 | CONFIG_I2S=y | ||||
59 | CONFIG_I2S_SAMSUNG=y | ||||
Simon Glass | 93a98a6 | 2018-12-10 10:37:44 -0700 | [diff] [blame] | 60 | CONFIG_SOUND_MAX98090=y |
Simon Glass | d4061aa | 2015-08-03 08:19:28 -0600 | [diff] [blame] | 61 | CONFIG_SOUND_MAX98095=y |
62 | CONFIG_SOUND_WM8994=y | ||||
Bin Meng | e5d5d44 | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 63 | CONFIG_EXYNOS_SPI=y |
Christophe Ricard | 0766ad2 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 64 | CONFIG_TPM_TIS_INFINEON=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 65 | CONFIG_USB=y |
66 | CONFIG_DM_USB=y | ||||
Masahiro Yamada | 0a8cc1a | 2016-06-04 07:35:03 +0900 | [diff] [blame] | 67 | CONFIG_USB_XHCI_HCD=y |
Masahiro Yamada | 10db750 | 2016-06-04 07:35:04 +0900 | [diff] [blame] | 68 | CONFIG_USB_XHCI_DWC3=y |
Chris Packham | ae35844 | 2017-08-28 20:50:45 +1200 | [diff] [blame] | 69 | CONFIG_USB_HOST_ETHER=y |
Simon Glass | bb5930d | 2016-02-21 21:09:01 -0700 | [diff] [blame] | 70 | CONFIG_DM_VIDEO=y |
Tom Rini | 8728c97 | 2017-03-13 13:48:42 -0400 | [diff] [blame] | 71 | CONFIG_VIDCONSOLE_AS_LCD=y |
Simon Glass | bb5930d | 2016-02-21 21:09:01 -0700 | [diff] [blame] | 72 | CONFIG_DISPLAY=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 73 | CONFIG_VIDEO_BRIDGE=y |
74 | CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y | ||||
Simon Glass | f8b19a8 | 2016-10-17 20:12:56 -0600 | [diff] [blame] | 75 | CONFIG_LCD=y |
Simon Glass | 26468d5 | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 76 | CONFIG_TPM=y |
Simon Glass | d4061aa | 2015-08-03 08:19:28 -0600 | [diff] [blame] | 77 | CONFIG_ERRNO_STR=y |