Rajeshwari Shinde | c5e3710 | 2012-06-06 19:54:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Samsung Electronics |
| 3 | * Rajeshwari Shinde <rajeshwari.s@samsung.com> |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef __ASM_ARM_ARCH_PERIPH_H |
| 25 | #define __ASM_ARM_ARCH_PERIPH_H |
| 26 | |
| 27 | /* |
Rajeshwari Shinde | d055911 | 2012-12-26 20:03:11 +0000 | [diff] [blame] | 28 | * Peripherals required for pinmux configuration. List will |
Rajeshwari Shinde | c5e3710 | 2012-06-06 19:54:29 +0000 | [diff] [blame] | 29 | * grow with support for more devices getting added. |
Rajeshwari Shinde | d055911 | 2012-12-26 20:03:11 +0000 | [diff] [blame] | 30 | * Numbering based on interrupt table. |
Rajeshwari Shinde | c5e3710 | 2012-06-06 19:54:29 +0000 | [diff] [blame] | 31 | * |
| 32 | */ |
| 33 | enum periph_id { |
Rajeshwari Shinde | d055911 | 2012-12-26 20:03:11 +0000 | [diff] [blame] | 34 | PERIPH_ID_UART0 = 51, |
| 35 | PERIPH_ID_UART1, |
| 36 | PERIPH_ID_UART2, |
| 37 | PERIPH_ID_UART3, |
| 38 | PERIPH_ID_I2C0 = 56, |
Rajeshwari Shinde | c65c05f | 2012-07-23 21:23:51 +0000 | [diff] [blame] | 39 | PERIPH_ID_I2C1, |
| 40 | PERIPH_ID_I2C2, |
| 41 | PERIPH_ID_I2C3, |
| 42 | PERIPH_ID_I2C4, |
| 43 | PERIPH_ID_I2C5, |
| 44 | PERIPH_ID_I2C6, |
| 45 | PERIPH_ID_I2C7, |
Rajeshwari Shinde | d055911 | 2012-12-26 20:03:11 +0000 | [diff] [blame] | 46 | PERIPH_ID_SPI0 = 68, |
| 47 | PERIPH_ID_SPI1, |
| 48 | PERIPH_ID_SPI2, |
| 49 | PERIPH_ID_SDMMC0 = 75, |
Rajeshwari Shinde | c5e3710 | 2012-06-06 19:54:29 +0000 | [diff] [blame] | 50 | PERIPH_ID_SDMMC1, |
| 51 | PERIPH_ID_SDMMC2, |
| 52 | PERIPH_ID_SDMMC3, |
Rajeshwari Shinde | d055911 | 2012-12-26 20:03:11 +0000 | [diff] [blame] | 53 | PERIPH_ID_I2S1 = 99, |
| 54 | |
| 55 | /* Since following peripherals do |
| 56 | * not have shared peripheral interrupts (SPIs) |
| 57 | * they are numbered arbitiraly after the maximum |
| 58 | * SPIs Exynos has (128) |
| 59 | */ |
| 60 | PERIPH_ID_SROMC = 128, |
Rajeshwari Shinde | fbb5743 | 2012-10-28 19:32:54 +0000 | [diff] [blame] | 61 | PERIPH_ID_SPI3, |
| 62 | PERIPH_ID_SPI4, |
Rajeshwari Shinde | d055911 | 2012-12-26 20:03:11 +0000 | [diff] [blame] | 63 | PERIPH_ID_SDMMC4, |
Rajeshwari Shinde | c5e3710 | 2012-06-06 19:54:29 +0000 | [diff] [blame] | 64 | |
| 65 | PERIPH_ID_COUNT, |
| 66 | PERIPH_ID_NONE = -1, |
| 67 | }; |
| 68 | |
| 69 | #endif /* __ASM_ARM_ARCH_PERIPH_H */ |