blob: b38e5ab935b976fdca4e97e86d5c03ee409d3795 [file] [log] [blame]
Ilya Yanok10bc2412009-08-11 02:32:09 +04001/*
2 * Copyright (C) 2007 Sascha Hauer, Pengutronix
3 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
4 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 *
21 */
22
23#include <common.h>
24#include <asm/io.h>
25#include <asm/arch/imx-regs.h>
trem953884c2012-08-25 05:30:34 +000026#include <asm/gpio.h>
Ilya Yanok10bc2412009-08-11 02:32:09 +040027
28DECLARE_GLOBAL_DATA_PTR;
29
Fabio Estevam77f11a92011-10-13 05:34:59 +000030int board_init(void)
Ilya Yanok10bc2412009-08-11 02:32:09 +040031{
Heiko Schocherbbe31092010-03-05 07:36:33 +010032#if defined(CONFIG_SYS_NAND_LARGEPAGE)
33 struct system_control_regs *sc_regs =
34 (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
35#endif
Ilya Yanok10bc2412009-08-11 02:32:09 +040036
37 gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE;
38 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
39
40#ifdef CONFIG_MXC_UART
Fabio Estevam3f7bfbd2011-07-01 07:15:52 +000041 mx27_uart1_init_pins();
Ilya Yanok10bc2412009-08-11 02:32:09 +040042#endif
43#ifdef CONFIG_FEC_MXC
44 mx27_fec_init_pins();
45 imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
trem953884c2012-08-25 05:30:34 +000046 gpio_set_value(GPIO_PORTC | 31, 1);
Ilya Yanok10bc2412009-08-11 02:32:09 +040047#endif
48#ifdef CONFIG_MXC_MMC
Heiko Schocherbbe31092010-03-05 07:36:33 +010049#if defined(CONFIG_MAGNESIUM)
50 mx27_sd1_init_pins();
51#else
Ilya Yanok10bc2412009-08-11 02:32:09 +040052 mx27_sd2_init_pins();
53#endif
Heiko Schocherbbe31092010-03-05 07:36:33 +010054#endif
Ilya Yanok10bc2412009-08-11 02:32:09 +040055
Heiko Schocherbbe31092010-03-05 07:36:33 +010056#if defined(CONFIG_SYS_NAND_LARGEPAGE)
57 /*
58 * set in FMCR NF_FMS Bit(5) to 1
59 * (NAND Flash with 2 Kbyte page size)
60 */
61 writel(readl(&sc_regs->fmcr) | (1 << 5), &sc_regs->fmcr);
62#endif
Ilya Yanok10bc2412009-08-11 02:32:09 +040063 return 0;
64}
65
Fabio Estevam77f11a92011-10-13 05:34:59 +000066int dram_init(void)
Ilya Yanok10bc2412009-08-11 02:32:09 +040067{
Heiko Schocherab86f722010-09-17 13:10:42 +020068 /* dram_init must store complete ramsize in gd->ram_size */
Albert ARIBAUDa55d23c2011-07-03 05:55:33 +000069 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
Heiko Schocherab86f722010-09-17 13:10:42 +020070 PHYS_SDRAM_1_SIZE);
71 return 0;
72}
Ilya Yanok10bc2412009-08-11 02:32:09 +040073
Heiko Schocherab86f722010-09-17 13:10:42 +020074void dram_init_banksize(void)
75{
76 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
Albert ARIBAUDa55d23c2011-07-03 05:55:33 +000077 gd->bd->bi_dram[0].size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
Ilya Yanok10bc2412009-08-11 02:32:09 +040078 PHYS_SDRAM_1_SIZE);
Ilya Yanok10bc2412009-08-11 02:32:09 +040079#if CONFIG_NR_DRAM_BANKS > 1
80 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
Albert ARIBAUDa55d23c2011-07-03 05:55:33 +000081 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
Ilya Yanok10bc2412009-08-11 02:32:09 +040082 PHYS_SDRAM_2_SIZE);
83#endif
Ilya Yanok10bc2412009-08-11 02:32:09 +040084}
85
86int checkboard(void)
87{
Fabio Estevam77f11a92011-10-13 05:34:59 +000088 puts("Board: ");
Heiko Schocherbbe31092010-03-05 07:36:33 +010089 puts(CONFIG_BOARDNAME);
Ilya Yanok10bc2412009-08-11 02:32:09 +040090 return 0;
91}