blob: 6ec507f6202d77ef175895b9ee5b7f8410759ab6 [file] [log] [blame]
wdenk153d5112002-08-30 11:07:04 +00001/*
stroese8b1ccd82004-09-16 12:34:51 +00002 * (C) Copyright 2001-2004
wdenk153d5112002-08-30 11:07:04 +00003 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include "ar405.h"
26#include <asm/processor.h>
Matthias Fuchs049216f2009-02-20 10:19:18 +010027#include <asm/io.h>
wdenk153d5112002-08-30 11:07:04 +000028#include <command.h>
wdenk153d5112002-08-30 11:07:04 +000029
Wolfgang Denkd87080b2006-03-31 18:32:53 +020030DECLARE_GLOBAL_DATA_PTR;
31
stroese8b1ccd82004-09-16 12:34:51 +000032extern void lxt971_no_sleep(void);
wdenk153d5112002-08-30 11:07:04 +000033
34/* ------------------------------------------------------------------------- */
35
36#if 0
37#define FPGA_DEBUG
38#endif
39
40/* fpga configuration data - generated by bin2cc */
41const unsigned char fpgadata[] = {
42#include "fpgadata.c"
43};
44
stroese8b1ccd82004-09-16 12:34:51 +000045const unsigned char fpgadata_xl30[] = {
46#include "fpgadata_xl30.c"
47};
48
wdenk153d5112002-08-30 11:07:04 +000049/*
50 * include common fpga code (for esd boards)
51 */
52#include "../common/fpga.c"
53
54
wdenkc837dcb2004-01-20 23:12:12 +000055int board_early_init_f (void)
wdenk153d5112002-08-30 11:07:04 +000056{
wdenk153d5112002-08-30 11:07:04 +000057 int index, len, i;
58 int status;
59
60#ifdef FPGA_DEBUG
61 /* set up serial port with default baudrate */
62 (void) get_clocks ();
63 gd->baudrate = CONFIG_BAUDRATE;
64 serial_init ();
65 console_init_f ();
66#endif
67
68 /*
69 * Boot onboard FPGA
70 */
stroese8b1ccd82004-09-16 12:34:51 +000071 /* first try 40er image */
72 gd->board_type = 40;
wdenk153d5112002-08-30 11:07:04 +000073 status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
74 if (status != 0) {
stroese8b1ccd82004-09-16 12:34:51 +000075 /* try xl30er image */
76 gd->board_type = 30;
77 status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
78 if (status != 0) {
79 /* booting FPGA failed */
wdenk153d5112002-08-30 11:07:04 +000080#ifndef FPGA_DEBUG
stroese8b1ccd82004-09-16 12:34:51 +000081 /* set up serial port with default baudrate */
82 (void) get_clocks ();
83 gd->baudrate = CONFIG_BAUDRATE;
84 serial_init ();
85 console_init_f ();
wdenk153d5112002-08-30 11:07:04 +000086#endif
stroese8b1ccd82004-09-16 12:34:51 +000087 printf ("\nFPGA: Booting failed ");
88 switch (status) {
89 case ERROR_FPGA_PRG_INIT_LOW:
90 printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
91 break;
92 case ERROR_FPGA_PRG_INIT_HIGH:
93 printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
94 break;
95 case ERROR_FPGA_PRG_DONE:
96 printf ("(Timeout: DONE not high after programming FPGA)\n ");
97 break;
98 }
wdenk153d5112002-08-30 11:07:04 +000099
stroese8b1ccd82004-09-16 12:34:51 +0000100 /* display infos on fpgaimage */
101 index = 15;
102 for (i = 0; i < 4; i++) {
103 len = fpgadata[index];
104 printf ("FPGA: %s\n", &(fpgadata[index + 1]));
105 index += len + 3;
106 }
107 putc ('\n');
108 /* delayed reboot */
109 for (i = 20; i > 0; i--) {
110 printf ("Rebooting in %2d seconds \r", i);
111 for (index = 0; index < 1000; index++)
112 udelay (1000);
113 }
114 putc ('\n');
115 do_reset (NULL, 0, 0, NULL);
wdenk153d5112002-08-30 11:07:04 +0000116 }
wdenk153d5112002-08-30 11:07:04 +0000117 }
118
119 /*
120 * IRQ 0-15 405GP internally generated; active high; level sensitive
121 * IRQ 16 405GP internally generated; active low; level sensitive
122 * IRQ 17-24 RESERVED
123 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
124 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
125 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
126 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
127 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
128 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
129 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
130 */
Stefan Roese952e7762009-09-24 09:55:50 +0200131 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
132 mtdcr (UIC0ER, 0x00000000); /* disable all ints */
133 mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
134 mtdcr (UIC0PR, 0xFFFFFF81); /* set int polarities */
135 mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
136 mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
137 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
wdenk153d5112002-08-30 11:07:04 +0000138
Matthias Fuchs049216f2009-02-20 10:19:18 +0100139 out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */
wdenk153d5112002-08-30 11:07:04 +0000140
141 return 0;
142}
143
wdenk153d5112002-08-30 11:07:04 +0000144/*
145 * Check Board Identity:
146 */
wdenk153d5112002-08-30 11:07:04 +0000147int checkboard (void)
148{
149 int index;
150 int len;
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200151 char str[64];
Wolfgang Denkcdb74972010-07-24 21:55:43 +0200152 int i = getenv_f("serial#", str, sizeof (str));
stroese8b1ccd82004-09-16 12:34:51 +0000153 const unsigned char *fpga;
wdenk153d5112002-08-30 11:07:04 +0000154
155 puts ("Board: ");
156
stroese8b1ccd82004-09-16 12:34:51 +0000157 if (i == -1) {
158 puts ("### No HW ID - assuming AR405");
159 } else {
160 puts(str);
wdenk153d5112002-08-30 11:07:04 +0000161 }
162
wdenk153d5112002-08-30 11:07:04 +0000163 puts ("\nFPGA: ");
164
165 /* display infos on fpgaimage */
stroese8b1ccd82004-09-16 12:34:51 +0000166 if (gd->board_type == 30) {
167 fpga = fpgadata_xl30;
168 } else {
169 fpga = fpgadata;
170 }
wdenk153d5112002-08-30 11:07:04 +0000171 index = 15;
172 for (i = 0; i < 4; i++) {
stroese8b1ccd82004-09-16 12:34:51 +0000173 len = fpga[index];
174 printf ("%s ", &(fpga[index + 1]));
wdenk153d5112002-08-30 11:07:04 +0000175 index += len + 3;
176 }
177
178 putc ('\n');
179
stroese8b1ccd82004-09-16 12:34:51 +0000180 /*
181 * Disable sleep mode in LXT971
182 */
183 lxt971_no_sleep();
184
wdenk153d5112002-08-30 11:07:04 +0000185 return 0;
186}
187
stroese8d3efe42004-12-16 18:30:36 +0000188
189#if 1 /* test-only: some internal test routines... */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100190#define DIGEN ((void *)0xf03000b4) /* u8 */
191#define DIGOUT ((void *)0xf03000b0) /* u16 */
192#define DIGIN ((void *)0xf03000a0) /* u16 */
193
stroese8d3efe42004-12-16 18:30:36 +0000194/*
195 * Some test routines
196 */
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200197int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000198{
stroese8d3efe42004-12-16 18:30:36 +0000199 int i;
200 int k;
201 int start;
202 int end;
203
204 if (argc != 3) {
205 puts("Usage: digtest n_start n_end (digtest 0 7)\n");
206 return 0;
207 }
208
209 start = simple_strtol (argv[1], NULL, 10);
210 end = simple_strtol (argv[2], NULL, 10);
211
212 /*
213 * Enable digital outputs
214 */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100215 out_8(DIGEN, 0x08);
stroese8d3efe42004-12-16 18:30:36 +0000216
217 printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
218 start, end);
219
220 /*
221 * Set outputs one by one
222 */
223 for (;;) {
224 for (i=start; i<=end; i++) {
Matthias Fuchs049216f2009-02-20 10:19:18 +0100225 out_be16(DIGOUT, 0x0001 << i);
stroese8d3efe42004-12-16 18:30:36 +0000226 for (k=0; k<200; k++)
227 udelay(1000);
228
Matthias Fuchs049216f2009-02-20 10:19:18 +0100229 if (in_be16(DIGIN) != (0x0001 << i)) {
230 printf("ERROR: OUT=0x%04X, IN=0x%04X\n",
231 0x0001 << i, in_be16(DIGIN));
stroese8d3efe42004-12-16 18:30:36 +0000232 return 0;
233 }
234
235 /* Abort if ctrl-c was pressed */
236 if (ctrlc()) {
237 puts("\nAbort\n");
238 return 0;
239 }
240 }
241 }
242
243 return 0;
244}
245U_BOOT_CMD(
246 digtest, 3, 1, do_digtest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600247 "Test digital in-/output",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200248 ""
249);
stroese8d3efe42004-12-16 18:30:36 +0000250
251#define ERROR_DELTA 256
252
253struct io {
Matthias Fuchs049216f2009-02-20 10:19:18 +0100254 short val;
stroese8d3efe42004-12-16 18:30:36 +0000255 short dummy;
256};
257
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200258int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000259{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100260 short val;
stroese8d3efe42004-12-16 18:30:36 +0000261 int i;
262 int volt;
263 struct io *out;
264 struct io *in;
265
266 out = (struct io *)0xf0300090;
267 in = (struct io *)0xf0300000;
268
269 i = simple_strtol (argv[1], NULL, 10);
270
271 volt = 0;
272 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100273 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000274 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100275 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000276 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
277 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
278 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
279 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
280 ((volt * 0x7fff) / 40) + ERROR_DELTA);
281 return -1;
282 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100283 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000284 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
285 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
286 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
287 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
288 ((volt * 0x7fff) / 40) + ERROR_DELTA);
289 return -1;
290 }
291
292 volt = 5;
293 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100294 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000295 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100296 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000297 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
298 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
299 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
300 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
301 ((volt * 0x7fff) / 40) + ERROR_DELTA);
302 return -1;
303 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100304 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000305 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
306 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
307 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
308 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
309 ((volt * 0x7fff) / 40) + ERROR_DELTA);
310 return -1;
311 }
312
313 volt = 10;
314 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100315 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000316 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100317 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000318 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
319 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
320 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
321 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
322 ((volt * 0x7fff) / 40) + ERROR_DELTA);
323 return -1;
324 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100325 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000326 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
327 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
328 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
329 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
330 ((volt * 0x7fff) / 40) + ERROR_DELTA);
331 return -1;
332 }
333
334 printf("Channel %d OK!\n", i);
335
336 return 0;
337}
338U_BOOT_CMD(
339 anatest, 2, 1, do_anatest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600340 "Test analog in-/output",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200341 ""
342);
stroese8d3efe42004-12-16 18:30:36 +0000343
344
345int counter = 0;
346
347void cyclicInt(void *ptr)
348{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100349 out_be16((void *)0xf03000e8, 0x0800); /* ack int */
stroese8d3efe42004-12-16 18:30:36 +0000350 counter++;
351}
352
353
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200354int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000355{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100356 ulong *incin;
stroese8d3efe42004-12-16 18:30:36 +0000357 int i;
358
Matthias Fuchs049216f2009-02-20 10:19:18 +0100359 incin = (ulong *)0xf0300040;
stroese8d3efe42004-12-16 18:30:36 +0000360
361 /*
362 * Clear inc counter
363 */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100364 out_be32((void *)&incin[0], 0);
365 out_be32((void *)&incin[1], 0);
366 out_be32((void *)&incin[2], 0);
367 out_be32((void *)&incin[3], 0);
stroese8d3efe42004-12-16 18:30:36 +0000368
Matthias Fuchs049216f2009-02-20 10:19:18 +0100369 incin = (ulong *)0xf0300050;
stroese8d3efe42004-12-16 18:30:36 +0000370
371 /*
372 * Inc a little
373 */
374 for (i=0; i<10000; i++) {
375 switch (i & 0x03) {
376 case 0:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100377 out_8(DIGEN, 0x02);
stroese8d3efe42004-12-16 18:30:36 +0000378 break;
379 case 1:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100380 out_8(DIGEN, 0x03);
stroese8d3efe42004-12-16 18:30:36 +0000381 break;
382 case 2:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100383 out_8(DIGEN, 0x01);
stroese8d3efe42004-12-16 18:30:36 +0000384 break;
385 case 3:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100386 out_8(DIGEN, 0x00);
stroese8d3efe42004-12-16 18:30:36 +0000387 break;
388 }
389 udelay(10);
390 }
391
Matthias Fuchs049216f2009-02-20 10:19:18 +0100392 printf("Inc 0 = %d\n", in_be32((void *)&incin[0]));
393 printf("Inc 1 = %d\n", in_be32((void *)&incin[1]));
394 printf("Inc 2 = %d\n", in_be32((void *)&incin[2]));
395 printf("Inc 3 = %d\n", in_be32((void *)&incin[3]));
stroese8d3efe42004-12-16 18:30:36 +0000396
Matthias Fuchs049216f2009-02-20 10:19:18 +0100397 out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */
398 out_be16((void *)0xf03000ec,
399 in_be16((void *)0xf03000ec) | 0x0800); /* enable int */
stroese8d3efe42004-12-16 18:30:36 +0000400 irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
401 printf("counter=%d\n", counter);
402
403 return 0;
404}
405U_BOOT_CMD(
406 inctest, 3, 1, do_inctest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600407 "Test incremental encoder inputs",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200408 ""
409);
stroese8d3efe42004-12-16 18:30:36 +0000410#endif