Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <mmc.h> |
| 9 | #include <pci_ids.h> |
Bin Meng | fe3fbd3 | 2015-07-30 03:49:18 -0700 | [diff] [blame] | 10 | #include <asm/irq.h> |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 11 | #include <asm/post.h> |
| 12 | |
| 13 | static struct pci_device_id mmc_supported[] = { |
| 14 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO }, |
| 15 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD }, |
| 16 | }; |
| 17 | |
| 18 | int cpu_mmc_init(bd_t *bis) |
| 19 | { |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 20 | return pci_mmc_init("ValleyView SDHCI", mmc_supported, |
| 21 | ARRAY_SIZE(mmc_supported)); |
| 22 | } |
| 23 | |
| 24 | int arch_cpu_init(void) |
| 25 | { |
| 26 | int ret; |
| 27 | |
| 28 | post_code(POST_CPU_INIT); |
| 29 | #ifdef CONFIG_SYS_X86_TSC_TIMER |
| 30 | timer_set_base(rdtsc()); |
| 31 | #endif |
| 32 | |
| 33 | ret = x86_cpu_init_f(); |
| 34 | if (ret) |
| 35 | return ret; |
| 36 | |
| 37 | return 0; |
| 38 | } |
Bin Meng | fe3fbd3 | 2015-07-30 03:49:18 -0700 | [diff] [blame] | 39 | |
| 40 | int arch_misc_init(void) |
| 41 | { |
| 42 | pirq_init(); |
| 43 | |
| 44 | return 0; |
| 45 | } |