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Simon Glassadfb2bf2015-08-30 16:55:43 -06001#
2# Copyright (C) 2015 Google. Inc
3# Written by Simon Glass <sjg@chromium.org>
4#
5# SPDX-License-Identifier: GPL-2.0+
6#
7
8U-Boot on Rockchip
9==================
10
11There are several repositories available with versions of U-Boot that support
12many Rockchip devices [1] [2].
13
14The current mainline support is experimental only and is not useful for
15anything. It should provide a base on which to build.
16
Simon Glassf1387132016-01-21 19:45:25 -070017So far only support for the RK3288 and RK3036 is provided.
Simon Glassadfb2bf2015-08-30 16:55:43 -060018
19
20Prerequisites
21=============
22
23You will need:
24
Simon Glassf1387132016-01-21 19:45:25 -070025 - Firefly RK3288 board or something else with a supported RockChip SoC
Simon Glassadfb2bf2015-08-30 16:55:43 -060026 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
29 - rkflashtool [3]
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
34
35
36Building
37========
38
39At present three RK3288 boards are supported:
40
41 - Firefly RK3288 - use firefly-rk3288 configuration
Simon Glass7c1058f2016-01-21 19:45:24 -070042 - Radxa Rock 2 - use rock2 configuration
Simon Glassf1387132016-01-21 19:45:25 -070043 - Hisense Chromebook - use chromebook_jerry configuration
Simon Glassadfb2bf2015-08-30 16:55:43 -060044
Simon Glassf1387132016-01-21 19:45:25 -070045Two RK3036 board are supported:
huang lin1d5a6962015-11-17 14:20:31 +080046
Simon Glassf1387132016-01-21 19:45:25 -070047 - EVB RK3036 - use evb-rk3036 configuration
48 - Kylin - use kylin_rk3036 configuration
huang lin1d5a6962015-11-17 14:20:31 +080049
Simon Glassadfb2bf2015-08-30 16:55:43 -060050For example:
51
52 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
53
54(or you can use another cross compiler if you prefer)
55
Simon Glassadfb2bf2015-08-30 16:55:43 -060056
57Writing to the board with USB
58=============================
59
60For USB to work you must get your board into ROM boot mode, either by erasing
61your MMC or (perhaps) holding the recovery button when you boot the board.
62To erase your MMC, you can boot into Linux and type (as root)
63
64 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
65
66Connect your board's OTG port to your computer.
67
68To create a suitable image and write it to the board:
69
Jeffy Chen717f8842015-11-27 12:07:18 +080070 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
Simon Glassf2acc55e2015-08-30 16:55:52 -060071 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
Simon Glassadfb2bf2015-08-30 16:55:43 -060072 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
73
74If all goes well you should something like:
75
76 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
77 Card did not respond to voltage select!
78 spl: mmc init failed with error: -17
79 ### ERROR ### Please RESET the board ###
80
81You will need to reset the board before each time you try. Yes, that's all
82it does so far. If support for the Rockchip USB protocol or DFU were added
83in SPL then we could in principle load U-Boot and boot to a prompt from USB
84as several other platforms do. However it does not seem to be possible to
85use the existing boot ROM code from SPL.
86
87
88Booting from an SD card
89=======================
90
91To write an image that boots from an SD card (assumed to be /dev/sdc):
92
Jeffy Chen717f8842015-11-27 12:07:18 +080093 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
Simon Glassf2acc55e2015-08-30 16:55:52 -060094 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
95 sudo dd if=out of=/dev/sdc seek=64 && \
Simon Glassadfb2bf2015-08-30 16:55:43 -060096 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
97
98This puts the Rockchip header and SPL image first and then places the U-Boot
99image at block 256 (i.e. 128KB from the start of the SD card). This
100corresponds with this setting in U-Boot:
101
102 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
103
104Put this SD (or micro-SD) card into your board and reset it. You should see
105something like:
106
Simon Glassf1387132016-01-21 19:45:25 -0700107 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
Simon Glassadfb2bf2015-08-30 16:55:43 -0600108
Simon Glassf1387132016-01-21 19:45:25 -0700109 Model: Radxa Rock 2 Square
Simon Glassadfb2bf2015-08-30 16:55:43 -0600110 DRAM: 2 GiB
Simon Glassf1387132016-01-21 19:45:25 -0700111 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
112 *** Warning - bad CRC, using default environment
Simon Glassadfb2bf2015-08-30 16:55:43 -0600113
Simon Glassf1387132016-01-21 19:45:25 -0700114 In: serial
115 Out: vop@ff940000.vidconsole
116 Err: serial
117 Net: Net Initialization Skipped
118 No ethernet found.
119 Hit any key to stop autoboot: 0
Simon Glassadfb2bf2015-08-30 16:55:43 -0600120 =>
121
Simon Glassf1387132016-01-21 19:45:25 -0700122If you have an HDMI cable attached you should see a video console.
123
huang lin1d5a6962015-11-17 14:20:31 +0800124For evb_rk3036 board:
Jeffy Chen717f8842015-11-27 12:07:18 +0800125 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
huang lin1d5a6962015-11-17 14:20:31 +0800126 cat evb-rk3036/u-boot-dtb.bin >> out && \
127 sudo dd if=out of=/dev/sdc seek=64
128
129Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
130 debug uart must be disabled
Simon Glassadfb2bf2015-08-30 16:55:43 -0600131
132Booting from SPI
133================
134
135To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
136
Simon Glassdd8e4292015-12-29 05:22:45 -0700137 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
138 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
139 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
140 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
Simon Glassadfb2bf2015-08-30 16:55:43 -0600141 dd if=out.bin of=out.bin.pad bs=4M conv=sync
142
143This converts the SPL image to the required SPI format by adding the Rockchip
144header and skipping every 2KB block. Then the U-Boot image is written at
145offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
146The position of U-Boot is controlled with this setting in U-Boot:
147
148 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
149
150If you have a Dediprog em100pro connected then you can write the image with:
151
152 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
153
154When booting you should see something like:
155
156 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
157
158
159 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
160
161 Model: Google Jerry
162 DRAM: 2 GiB
163 MMC:
164 Using default environment
165
166 In: serial@ff690000
167 Out: serial@ff690000
168 Err: serial@ff690000
169 =>
170
171
172Future work
173===========
174
175Immediate priorities are:
176
Simon Glassadfb2bf2015-08-30 16:55:43 -0600177- USB host
178- USB device
Simon Glassf1387132016-01-21 19:45:25 -0700179- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
Simon Glassadfb2bf2015-08-30 16:55:43 -0600180- Ethernet
181- NAND flash
182- Support for other Rockchip parts
183- Boot U-Boot proper over USB OTG (at present only SPL works)
184
185
186Development Notes
187=================
188
189There are plenty of patches in the links below to help with this work.
190
191[1] https://github.com/rkchrome/uboot.git
192[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
193[3] https://github.com/linux-rockchip/rkflashtool.git
194[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
195
196rkimage
197-------
198
199rkimage.c produces an SPL image suitable for sending directly to the boot ROM
200over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
201followed by u-boot-spl-dtb.bin.
202
203The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
204starts at 0xff700000 and extends to 0xff718000 where we put the stack.
205
206rksd
207----
208
209rksd.c produces an image consisting of 32KB of empty space, a header and
210u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
211most of the fields are unused by U-Boot. We just need to specify the
212signature, a flag and the block offset and size of the SPL image.
213
214The header occupies a single block but we pad it out to 4 blocks. The header
215is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
216image can be encoded too but we don't do that.
217
218The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
219or 0x40 blocks. This is a severe and annoying limitation. There may be a way
220around this limitation, since there is plenty of SRAM, but at present the
221board refuses to boot if this limit is exceeded.
222
223The image produced is padded up to a block boundary (512 bytes). It should be
224written to the start of an SD card using dd.
225
226Since this image is set to load U-Boot from the SD card at block offset,
227CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
228u-boot-dtb.img to the SD card at that offset. See above for instructions.
229
230rkspi
231-----
232
233rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
234resulting image is then spread out so that only the first 2KB of each 4KB
235sector is used. The header is the same as with rksd and the maximum size is
236also 32KB (before spreading). The image should be written to the start of
237SPI flash.
238
239See above for instructions on how to write a SPI image.
240
Simon Glass002c6342016-01-21 19:45:08 -0700241rkmux.py
242--------
243
244You can use this script to create #defines for SoC register access. See the
245script for usage.
246
Simon Glassadfb2bf2015-08-30 16:55:43 -0600247
248Device tree and driver model
249----------------------------
250
251Where possible driver model is used to provide a structure to the
252functionality. Device tree is used for configuration. However these have an
253overhead and in SPL with a 32KB size limit some shortcuts have been taken.
254In general all Rockchip drivers should use these features, with SPL-specific
255modifications where required.
256
257
258--
259Simon Glass <sjg@chromium.org>
26024 June 2015