Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0+ |
Ben Warren | 04a9e11 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 2 | # |
| 3 | # (C) Copyright 2000-2007 |
| 4 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Ben Warren | 04a9e11 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 5 | |
Simon Glass | ba6c3ce | 2013-03-11 06:08:00 +0000 | [diff] [blame] | 6 | # There are many options which enable SPI, so make this library available |
Lukasz Majewski | 56c4046 | 2020-06-04 23:11:53 +0800 | [diff] [blame] | 7 | ifdef CONFIG_$(SPL_TPL_)DM_SPI |
Simon Glass | d7af6a4 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 8 | obj-y += spi-uclass.o |
Tom Rini | 582b4f7 | 2020-06-16 19:06:31 -0400 | [diff] [blame] | 9 | obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o |
Simon Glass | c60e1f2 | 2014-10-13 23:41:53 -0600 | [diff] [blame] | 10 | obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o |
Simon Glass | 623b638 | 2014-10-13 23:42:00 -0600 | [diff] [blame] | 11 | obj-$(CONFIG_SOFT_SPI) += soft_spi.o |
Boris Brezillon | d13f5b2 | 2018-08-16 17:30:11 +0200 | [diff] [blame] | 12 | obj-$(CONFIG_SPI_MEM) += spi-mem.o |
Vignesh Raghavendra | 61ae978 | 2019-04-16 21:31:59 +0530 | [diff] [blame] | 13 | obj-$(CONFIG_TI_QSPI) += ti_qspi.o |
Frieder Schrempf | 6b86554 | 2021-06-07 14:36:42 +0200 | [diff] [blame] | 14 | obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o |
Simon Glass | d7af6a4 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 15 | else |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 16 | obj-y += spi.o |
Vignesh R | 6430eea | 2019-02-05 11:29:15 +0530 | [diff] [blame] | 17 | obj-$(CONFIG_SPI_MEM) += spi-mem-nodm.o |
Simon Glass | d7af6a4 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 18 | endif |
Simon Glass | ba6c3ce | 2013-03-11 06:08:00 +0000 | [diff] [blame] | 19 | |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 20 | obj-$(CONFIG_ALTERA_SPI) += altera_spi.o |
Wills Wang | b85dc46 | 2016-03-16 16:59:58 +0800 | [diff] [blame] | 21 | obj-$(CONFIG_ATH79_SPI) += ath79_spi.o |
Tudor Ambarus | 24c8ff4 | 2019-06-18 08:51:50 +0000 | [diff] [blame] | 22 | obj-$(CONFIG_ATMEL_QSPI) += atmel-quadspi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 23 | obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o |
Álvaro Fernández Rojas | 29cc436 | 2018-01-20 02:13:38 +0100 | [diff] [blame] | 24 | obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o |
Álvaro Fernández Rojas | 5ac07d2 | 2018-01-23 17:14:58 +0100 | [diff] [blame] | 25 | obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o |
Thomas Fitzsimmons | 894c3ad | 2018-06-08 17:59:45 -0400 | [diff] [blame] | 26 | obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 27 | obj-$(CONFIG_CF_SPI) += cf_spi.o |
Pengpeng Chen | 24f2794 | 2020-07-30 12:52:45 -0700 | [diff] [blame] | 28 | obj-$(CONFIG_CORTINA_SFLASH) += ca_sflash.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 29 | obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o |
Stefan Roese | 5bef6fd | 2014-11-07 13:50:31 +0100 | [diff] [blame] | 30 | obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 31 | obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o |
Jagan Teki | 1360004 | 2015-06-27 13:51:53 +0530 | [diff] [blame] | 32 | obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o |
| 33 | obj-$(CONFIG_FSL_ESPI) += fsl_espi.o |
Jassi Brar | 971a344 | 2021-06-04 18:44:27 +0900 | [diff] [blame] | 34 | obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 35 | obj-$(CONFIG_ICH_SPI) += ich.o |
| 36 | obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o |
Neil Armstrong | 9d26506 | 2018-11-22 11:01:05 +0100 | [diff] [blame] | 37 | obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o |
Christophe Leroy | f88c431 | 2017-07-06 10:33:25 +0200 | [diff] [blame] | 38 | obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 39 | obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o |
Weijie Gao | 603fcd1 | 2019-07-22 17:09:01 +0530 | [diff] [blame] | 40 | obj-$(CONFIG_MTK_SNFI_SPI) += mtk_snfi_spi.o |
SkyLake.Huang | 7a49d61 | 2021-01-20 15:31:33 +0800 | [diff] [blame] | 41 | obj-$(CONFIG_MTK_SNOR) += mtk_snor.o |
Weijie Gao | 2db6fba | 2020-11-12 16:36:42 +0800 | [diff] [blame] | 42 | obj-$(CONFIG_MT7620_SPI) += mt7620_spi.o |
Stefan Roese | 5eee9de | 2018-08-16 10:48:48 +0200 | [diff] [blame] | 43 | obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o |
Lars Povlsen | fd6e0b0 | 2019-01-08 10:38:33 +0100 | [diff] [blame] | 44 | obj-$(CONFIG_MSCC_BB_SPI) += mscc_bb_spi.o |
Stefan Roese | 3fda4ef | 2016-05-19 15:56:44 +0200 | [diff] [blame] | 45 | obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 46 | obj-$(CONFIG_MXC_SPI) += mxc_spi.o |
| 47 | obj-$(CONFIG_MXS_SPI) += mxs_spi.o |
Michael Walle | 383fded | 2019-12-18 00:09:58 +0100 | [diff] [blame] | 48 | obj-$(CONFIG_NXP_FSPI) += nxp_fspi.o |
Rick Chen | 41bbb8b | 2017-11-23 14:19:36 +0800 | [diff] [blame] | 49 | obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o |
Suneel Garapati | 7853cc0 | 2020-07-30 13:56:18 +0200 | [diff] [blame] | 50 | obj-$(CONFIG_OCTEON_SPI) += octeon_spi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 51 | obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o |
Purna Chandra Mandal | e19b900 | 2016-06-02 14:26:08 +0530 | [diff] [blame] | 52 | obj-$(CONFIG_PIC32_SPI) += pic32_spi.o |
Quentin Schulz | 8a4791f | 2018-08-31 16:28:29 +0200 | [diff] [blame] | 53 | obj-$(CONFIG_PL022_SPI) += pl022_spi.o |
Robert Marko | 367ea42 | 2020-10-08 22:05:09 +0200 | [diff] [blame] | 54 | obj-$(CONFIG_SPI_QUP) += spi-qup.o |
Zhengxun | 0d7066b | 2021-06-23 17:15:15 +0000 | [diff] [blame] | 55 | obj-$(CONFIG_SPI_MXIC) += spi-mxic.o |
Marek Vasut | fbebea2 | 2017-11-29 06:29:46 +0100 | [diff] [blame] | 56 | obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o |
Chris Morgan | 3fb08a2 | 2021-08-05 16:26:38 +0800 | [diff] [blame] | 57 | obj-$(CONFIG_ROCKCHIP_SFC) += rockchip_sfc.o |
Simon Glass | 1b2fd5b | 2015-09-01 19:19:37 -0600 | [diff] [blame] | 58 | obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o |
Mike Frysinger | 6122813 | 2013-12-03 16:43:26 -0700 | [diff] [blame] | 59 | obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o |
Bhargav Shah | a2f32bf | 2019-07-17 04:23:43 +0000 | [diff] [blame] | 60 | obj-$(CONFIG_SPI_SIFIVE) += spi-sifive.o |
Jagan Teki | a51cd54 | 2019-02-27 20:02:13 +0530 | [diff] [blame] | 61 | obj-$(CONFIG_SPI_SUNXI) += spi-sunxi.o |
Nobuhiro Iwamatsu | 16f47c9 | 2013-12-18 15:31:55 +0900 | [diff] [blame] | 62 | obj-$(CONFIG_SH_QSPI) += sh_qspi.o |
Michael Kurz | d4363ba | 2017-01-22 16:04:30 +0100 | [diff] [blame] | 63 | obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o |
Patrice Chotard | a2a89b2 | 2019-04-30 18:08:28 +0200 | [diff] [blame] | 64 | obj-$(CONFIG_STM32_SPI) += stm32_spi.o |
Jagan Teki | 1360004 | 2015-06-27 13:51:53 +0530 | [diff] [blame] | 65 | obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 66 | obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o |
| 67 | obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o |
Tom Warren | 4e675ff | 2015-10-12 14:50:54 -0700 | [diff] [blame] | 68 | obj-$(CONFIG_TEGRA210_QSPI) += tegra210_qspi.o |
Kunihiko Hayashi | 9424ecd | 2019-07-05 10:03:18 +0900 | [diff] [blame] | 69 | obj-$(CONFIG_UNIPHIER_SPI) += uniphier_spi.o |
Masahiro Yamada | 710f1d3 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 70 | obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o |
| 71 | obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o |
Jagan Teki | 46d0a99 | 2015-08-17 18:38:06 +0530 | [diff] [blame] | 72 | obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o |
Siva Durga Prasad Paladugu | 22cca17 | 2018-07-04 17:31:23 +0530 | [diff] [blame] | 73 | obj-$(CONFIG_ZYNQMP_GQSPI) += zynqmp_gqspi.o |