John Rigby | afbf889 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2009 ST-Ericsson SA |
| 3 | * |
| 4 | * Adapted from the Linux version: |
| 5 | * Author: Kumar Sanghvi <kumar.sanghvi@stericsson.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | * This program is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License version 2 |
| 22 | * as published by the Free Software Foundation. |
| 23 | */ |
| 24 | |
| 25 | /* |
| 26 | * NOTE: This currently does not support the I2C workaround access method. |
| 27 | */ |
| 28 | |
| 29 | #include <common.h> |
| 30 | #include <config.h> |
| 31 | #include <asm/io.h> |
| 32 | #include <asm/arch/hardware.h> |
| 33 | #include <asm/types.h> |
| 34 | #include <asm/io.h> |
| 35 | #include <asm/errno.h> |
| 36 | |
| 37 | #include "prcmu-fw.h" |
| 38 | |
| 39 | /* CPU mailbox registers */ |
| 40 | #define PRCM_MBOX_CPU_VAL (U8500_PRCMU_BASE + 0x0fc) |
| 41 | #define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100) |
| 42 | #define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104) |
| 43 | |
| 44 | static int prcmu_is_ready(void) |
| 45 | { |
| 46 | int ready = readb(PRCM_XP70_CUR_PWR_STATE) == AP_EXECUTE; |
| 47 | if (!ready) |
| 48 | printf("PRCMU firmware not ready\n"); |
| 49 | return ready; |
| 50 | } |
| 51 | |
| 52 | static int _wait_for_req_complete(int num) |
| 53 | { |
| 54 | int timeout = 1000; |
| 55 | |
| 56 | /* checking any already on-going transaction */ |
| 57 | while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout--) |
| 58 | ; |
| 59 | |
| 60 | timeout = 1000; |
| 61 | |
| 62 | /* Set an interrupt to XP70 */ |
| 63 | writel(1 << num, PRCM_MBOX_CPU_SET); |
| 64 | |
| 65 | while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout--) |
| 66 | ; |
| 67 | |
| 68 | if (!timeout) { |
| 69 | printf("PRCMU operation timed out\n"); |
| 70 | return -1; |
| 71 | } |
| 72 | |
| 73 | return 0; |
| 74 | } |
| 75 | |
| 76 | /** |
| 77 | * prcmu_i2c_read - PRCMU - 4500 communication using PRCMU I2C |
| 78 | * @reg: - db8500 register bank to be accessed |
| 79 | * @slave: - db8500 register to be accessed |
| 80 | * Returns: ACK_MB5 value containing the status |
| 81 | */ |
| 82 | int prcmu_i2c_read(u8 reg, u16 slave) |
| 83 | { |
| 84 | uint8_t i2c_status; |
| 85 | uint8_t i2c_val; |
| 86 | |
| 87 | if (!prcmu_is_ready()) |
| 88 | return -1; |
| 89 | |
| 90 | debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n", |
| 91 | reg, slave); |
| 92 | |
| 93 | /* prepare the data for mailbox 5 */ |
| 94 | writeb((reg << 1) | I2CREAD, PRCM_REQ_MB5_I2COPTYPE_REG); |
| 95 | writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS); |
| 96 | writeb(slave, PRCM_REQ_MB5_I2CSLAVE); |
| 97 | writeb(0, PRCM_REQ_MB5_I2CVAL); |
| 98 | |
| 99 | _wait_for_req_complete(REQ_MB5); |
| 100 | |
| 101 | /* retrieve values */ |
| 102 | debug("ack-mb5:transfer status = %x\n", |
| 103 | readb(PRCM_ACK_MB5_STATUS)); |
| 104 | debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1); |
| 105 | debug("ack-mb5:slave_add = %x\n", |
| 106 | readb(PRCM_ACK_MB5_SLAVE)); |
| 107 | debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL)); |
| 108 | |
| 109 | i2c_status = readb(PRCM_ACK_MB5_STATUS); |
| 110 | i2c_val = readb(PRCM_ACK_MB5_VAL); |
| 111 | |
| 112 | if (i2c_status == I2C_RD_OK) |
| 113 | return i2c_val; |
| 114 | else { |
| 115 | |
| 116 | printf("prcmu_i2c_read:read return status= %d\n", |
| 117 | i2c_status); |
| 118 | return -1; |
| 119 | } |
| 120 | |
| 121 | } |
| 122 | |
| 123 | /** |
| 124 | * prcmu_i2c_write - PRCMU-db8500 communication using PRCMU I2C |
| 125 | * @reg: - db8500 register bank to be accessed |
| 126 | * @slave: - db800 register to be written to |
| 127 | * @reg_data: - the data to write |
| 128 | * Returns: ACK_MB5 value containing the status |
| 129 | */ |
| 130 | int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data) |
| 131 | { |
| 132 | uint8_t i2c_status; |
| 133 | |
| 134 | if (!prcmu_is_ready()) |
| 135 | return -1; |
| 136 | |
| 137 | debug("\nprcmu_4500_i2c_write:bank=%x;reg=%x;\n", |
| 138 | reg, slave); |
| 139 | |
| 140 | /* prepare the data for mailbox 5 */ |
| 141 | writeb((reg << 1) | I2CWRITE, PRCM_REQ_MB5_I2COPTYPE_REG); |
| 142 | writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS); |
| 143 | writeb(slave, PRCM_REQ_MB5_I2CSLAVE); |
| 144 | writeb(reg_data, PRCM_REQ_MB5_I2CVAL); |
| 145 | |
| 146 | debug("\ncpu_is_u8500v11\n"); |
| 147 | _wait_for_req_complete(REQ_MB5); |
| 148 | |
| 149 | /* retrieve values */ |
| 150 | debug("ack-mb5:transfer status = %x\n", |
| 151 | readb(PRCM_ACK_MB5_STATUS)); |
| 152 | debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1); |
| 153 | debug("ack-mb5:slave_add = %x\n", |
| 154 | readb(PRCM_ACK_MB5_SLAVE)); |
| 155 | debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL)); |
| 156 | |
| 157 | i2c_status = readb(PRCM_ACK_MB5_STATUS); |
| 158 | debug("\ni2c_status = %x\n", i2c_status); |
| 159 | if (i2c_status == I2C_WR_OK) |
| 160 | return 0; |
| 161 | else { |
| 162 | printf("ape-i2c: i2c_status : 0x%x\n", i2c_status); |
| 163 | return -1; |
| 164 | } |
| 165 | } |