| Andreas Bießmann | ad7a178 | 2011-06-30 22:03:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 |
| 3 | * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de> |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | #include <common.h> |
| 24 | |
| 25 | #include <asm/io.h> |
| 26 | #include <asm/sdram.h> |
| 27 | #include <asm/arch/clk.h> |
| 28 | #include <asm/arch/hmatrix.h> |
| 29 | #include <asm/arch/mmu.h> |
| 30 | #include <asm/arch/portmux.h> |
| 31 | #include <netdev.h> |
| 32 | |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
| 35 | struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { |
| 36 | { |
| 37 | .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, |
| 38 | .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, |
| 39 | .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) |
| 40 | | MMU_VMR_CACHE_NONE, |
| 41 | }, { |
| 42 | .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, |
| 43 | .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, |
| 44 | .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) |
| 45 | | MMU_VMR_CACHE_WRBACK, |
| 46 | }, |
| 47 | }; |
| 48 | |
| 49 | static const struct sdram_config sdram_config = { |
| 50 | /* Dual MT48LC16M16A2-7E (or equal) */ |
| 51 | .data_bits = SDRAM_DATA_32BIT, |
| 52 | .row_bits = 13, |
| 53 | .col_bits = 9, |
| 54 | .bank_bits = 2, |
| 55 | .cas = 2, |
| 56 | .twr = 2, |
| 57 | .trc = 7, |
| 58 | .trp = 2, |
| 59 | .trcd = 2, |
| 60 | .tras = 4, |
| 61 | .txsr = 7, |
| 62 | /* 7.81 us */ |
| 63 | .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, |
| 64 | }; |
| 65 | |
| 66 | int board_early_init_f(void) |
| 67 | { |
| 68 | /* Enable SDRAM in the EBI mux */ |
| 69 | hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); |
| 70 | |
| 71 | portmux_enable_ebi(SDRAM_DATA_32BIT, 23, 0, PORTMUX_DRIVE_HIGH); |
| 72 | portmux_enable_usart0(PORTMUX_DRIVE_MIN); |
| 73 | portmux_enable_usart1(PORTMUX_DRIVE_MIN); |
| 74 | #if defined(CONFIG_MACB) |
| 75 | portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW); |
| 76 | #endif |
| 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | phys_size_t initdram(int board_type) |
| 82 | { |
| 83 | unsigned long expected_size; |
| 84 | unsigned long actual_size; |
| 85 | void *sdram_base; |
| 86 | |
| 87 | sdram_base = uncached(EBI_SDRAM_BASE); |
| 88 | |
| 89 | expected_size = sdram_init(sdram_base, &sdram_config); |
| 90 | actual_size = get_ram_size(sdram_base, expected_size); |
| 91 | |
| 92 | if (expected_size != actual_size) |
| 93 | printf("Warning: Only %lu of %lu MiB SDRAM is working\n", |
| 94 | actual_size >> 20, expected_size >> 20); |
| 95 | |
| 96 | return actual_size; |
| 97 | } |
| 98 | |
| 99 | int board_early_init_r(void) |
| 100 | { |
| 101 | gd->bd->bi_phy_id[0] = 0x00; |
| 102 | return 0; |
| 103 | } |
| 104 | |
| 105 | #ifdef CONFIG_CMD_NET |
| 106 | int board_eth_init(bd_t *bi) |
| 107 | { |
| 108 | macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]); |
| 109 | return 0; |
| 110 | } |
| 111 | #endif |
| 112 | /* vim: set noet ts=8: */ |