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wdenkf682e422002-10-26 16:57:25 +00001/*
2 * (C) Copyright 2002
3 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/* #define DEBUG */
25
26#include <common.h>
27#include <environment.h>
28
wdenk6069ff22003-02-28 00:49:47 +000029static ulong flash_get_size (vu_long *addr, flash_info_t *info);
wdenkf682e422002-10-26 16:57:25 +000030
31flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
32
33
34#define CMD_READ_ARRAY 0x00F000F0
35#define CMD_UNLOCK1 0x00AA00AA
36#define CMD_UNLOCK2 0x00550055
37#define CMD_ERASE_SETUP 0x00800080
38#define CMD_ERASE_CONFIRM 0x00300030
39#define CMD_PROGRAM 0x00A000A0
40#define CMD_UNLOCK_BYPASS 0x00200020
wdenk6069ff22003-02-28 00:49:47 +000041#define CMD_READ_MANF_ID 0x00900090
wdenkb4757ce2003-11-17 21:45:27 +000042#define CMD_UNLOCK_BYPASS_RES1 0x00900090
43#define CMD_UNLOCK_BYPASS_RES2 0x00000000
wdenkf682e422002-10-26 16:57:25 +000044
wdenkb4757ce2003-11-17 21:45:27 +000045#define MEM_FLASH_ADDR (*(volatile u32 *)CFG_FLASH_BASE)
wdenkf682e422002-10-26 16:57:25 +000046#define MEM_FLASH_ADDR1 (*(volatile u32 *)(CFG_FLASH_BASE + (0x00000555 << 2)))
47#define MEM_FLASH_ADDR2 (*(volatile u32 *)(CFG_FLASH_BASE + (0x000002AA << 2)))
48
49#define BIT_ERASE_DONE 0x00800080
50#define BIT_RDY_MASK 0x00800080
51#define BIT_PROGRAM_ERROR 0x00200020
52#define BIT_TIMEOUT 0x80000000 /* our flag */
53
54#define READY 1
55#define ERR 2
56#define TMO 4
57
58/*-----------------------------------------------------------------------
59 */
60
61ulong flash_init (void)
62{
63 int i, j;
64 ulong size = 0;
65
wdenk6069ff22003-02-28 00:49:47 +000066 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
wdenkf682e422002-10-26 16:57:25 +000067 ulong flashbase = 0;
wdenk6069ff22003-02-28 00:49:47 +000068 flash_info_t *info = &flash_info[i];
wdenkf682e422002-10-26 16:57:25 +000069
wdenk6069ff22003-02-28 00:49:47 +000070 /* Init: no FLASHes known */
71 info->flash_id = FLASH_UNKNOWN;
72
73 size += flash_get_size (CFG_FLASH_BASE, info);
74
wdenkf682e422002-10-26 16:57:25 +000075 if (i == 0)
wdenk6069ff22003-02-28 00:49:47 +000076 flashbase = CFG_FLASH_BASE;
wdenkf682e422002-10-26 16:57:25 +000077 else
78 panic ("configured too many flash banks!\n");
wdenk6069ff22003-02-28 00:49:47 +000079 for (j = 0; j < info->sector_count; j++) {
wdenkf682e422002-10-26 16:57:25 +000080
wdenk6069ff22003-02-28 00:49:47 +000081 info->protect[j] = 0;
82 info->start[j] = flashbase;
wdenkf682e422002-10-26 16:57:25 +000083
wdenk6069ff22003-02-28 00:49:47 +000084 switch (info->flash_id & FLASH_TYPEMASK) {
85 case (FLASH_AM320B & FLASH_TYPEMASK):
wdenkefa329c2004-03-23 20:18:25 +000086 case (FLASH_MXLV320B & FLASH_TYPEMASK):
wdenk6069ff22003-02-28 00:49:47 +000087 /* Boot sector type: 8 x 8 + N x 128 kB */
88 flashbase += (j < 8) ? 0x4000 : 0x20000;
89 break;
90 case (FLASH_AM640U & FLASH_TYPEMASK):
91 /* Uniform sector type: 128 kB */
92 flashbase += 0x20000;
93 break;
94 default:
95 printf ("## Bad flash chip type 0x%04lX\n",
96 info->flash_id & FLASH_TYPEMASK);
97 }
wdenkf682e422002-10-26 16:57:25 +000098 }
wdenkf682e422002-10-26 16:57:25 +000099 }
100
101 /*
102 * Protect monitor and environment sectors
103 */
104 flash_protect ( FLAG_PROTECT_SET,
105 CFG_FLASH_BASE,
wdenk3b57fe02003-05-30 12:48:29 +0000106 CFG_FLASH_BASE + monitor_flash_len - 1,
wdenkf682e422002-10-26 16:57:25 +0000107 &flash_info[0]);
108
109 flash_protect ( FLAG_PROTECT_SET,
110 CFG_ENV_ADDR,
111 CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
112
113#ifdef CFG_ENV_ADDR_REDUND
114 flash_protect ( FLAG_PROTECT_SET,
115 CFG_ENV_ADDR_REDUND,
116 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
117 &flash_info[0]);
118#endif
119
120 return size;
121}
122
123/*-----------------------------------------------------------------------
124 */
125void flash_print_info (flash_info_t * info)
126{
127 int i;
128
129 switch (info->flash_id & FLASH_VENDMASK) {
wdenk6069ff22003-02-28 00:49:47 +0000130 case (FLASH_MAN_AMD & FLASH_VENDMASK):
wdenk1cb8e982003-03-06 21:55:29 +0000131 printf ("AMD "); break;
132 case (FLASH_MAN_FUJ & FLASH_VENDMASK):
133 printf ("FUJITSU "); break;
wdenkefa329c2004-03-23 20:18:25 +0000134 case (FLASH_MAN_MX & FLASH_VENDMASK):
135 printf ("MACRONIX "); break;
wdenk1cb8e982003-03-06 21:55:29 +0000136 default: printf ("Unknown Vendor "); break;
wdenkf682e422002-10-26 16:57:25 +0000137 }
138
139 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk6069ff22003-02-28 00:49:47 +0000140 case (FLASH_AM320B & FLASH_TYPEMASK):
wdenkf682e422002-10-26 16:57:25 +0000141 printf ("2x Am29LV320DB (32Mbit)\n");
142 break;
wdenkefa329c2004-03-23 20:18:25 +0000143 case (FLASH_MXLV320B & FLASH_TYPEMASK):
144 printf ("2x MX29LV320DB (32Mbit)\n");
145 break;
wdenk6069ff22003-02-28 00:49:47 +0000146 case (FLASH_AM640U & FLASH_TYPEMASK):
147 printf ("2x Am29LV640D (64Mbit)\n");
148 break;
wdenkf682e422002-10-26 16:57:25 +0000149 default:
150 printf ("Unknown Chip Type\n");
151 goto Done;
152 break;
153 }
154
155 printf (" Size: %ld MB in %d Sectors\n",
156 info->size >> 20, info->sector_count);
157
158 printf (" Sector Start Addresses:");
159 for (i = 0; i < info->sector_count; i++) {
160 if ((i % 5) == 0) {
161 printf ("\n ");
162 }
163 printf (" %08lX%s",
164 info->start[i],
165 info->protect[i] ? " (RO)" : " ");
166 }
167 printf ("\n");
168
169 Done:
170}
171
172/*-----------------------------------------------------------------------
173 */
174
175int flash_erase (flash_info_t * info, int s_first, int s_last)
176{
177 ulong result;
178
179#if 0
180 int cflag;
181#endif
182 int iflag, prot, sect;
183 int rc = ERR_OK;
184 int chip1, chip2;
185
186 debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last);
187
188 /* first look for protection bits */
189
190 if (info->flash_id == FLASH_UNKNOWN)
191 return ERR_UNKNOWN_FLASH_TYPE;
192
193 if ((s_first < 0) || (s_first > s_last)) {
194 return ERR_INVAL;
195 }
196
wdenk3bac3512003-03-12 10:41:04 +0000197 switch (info->flash_id & FLASH_VENDMASK) {
198 case (FLASH_MAN_AMD & FLASH_VENDMASK): break; /* OK */
199 case (FLASH_MAN_FUJ & FLASH_VENDMASK): break; /* OK */
wdenkefa329c2004-03-23 20:18:25 +0000200 case (FLASH_MAN_MX & FLASH_VENDMASK): break; /* OK */
wdenk3bac3512003-03-12 10:41:04 +0000201 default:
202 debug ("## flash_erase: unknown manufacturer\n");
203 return (ERR_UNKNOWN_FLASH_VENDOR);
wdenkf682e422002-10-26 16:57:25 +0000204 }
205
206 prot = 0;
207 for (sect = s_first; sect <= s_last; ++sect) {
208 if (info->protect[sect]) {
209 prot++;
210 }
211 }
212
213 if (prot) {
214 printf ("- Warning: %d protected sectors will not be erased!\n",
215 prot);
216 } else {
217 printf ("\n");
218 }
219
220 /*
221 * Disable interrupts which might cause a timeout
222 * here. Remember that our exception vectors are
223 * at address 0 in the flash, and we don't want a
224 * (ticker) exception to happen while the flash
225 * chip is in programming mode.
226 */
227#if 0
228 cflag = icache_status ();
229 icache_disable ();
230#endif
231 iflag = disable_interrupts ();
232
233 /* Start erase on unprotected sectors */
234 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
235
236 debug ("Erasing sector %2d @ %08lX... ",
237 sect, info->start[sect]);
238
239 /* arm simple, non interrupt dependent timer */
240 reset_timer_masked ();
241
242 if (info->protect[sect] == 0) { /* not protected */
243 vu_long *addr = (vu_long *) (info->start[sect]);
244
245 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
246 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
247 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
248
249 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
250 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
251 *addr = CMD_ERASE_CONFIRM;
252
253 /* wait until flash is ready */
254 chip1 = chip2 = 0;
255
256 do {
257 result = *addr;
258
259 /* check timeout */
260 if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
261 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
262 chip1 = TMO;
263 break;
264 }
265
266 if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
267 chip1 = READY;
268
269 if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
270 chip1 = ERR;
271
272 if (!chip2 && (result >> 16) & BIT_ERASE_DONE)
273 chip2 = READY;
274
275 if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR)
276 chip2 = ERR;
277
278 } while (!chip1 || !chip2);
279
280 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
281
282 if (chip1 == ERR || chip2 == ERR) {
283 rc = ERR_PROG_ERROR;
284 goto outahere;
285 }
286 if (chip1 == TMO) {
287 rc = ERR_TIMOUT;
288 goto outahere;
289 }
wdenkf682e422002-10-26 16:57:25 +0000290 }
291 }
292
293outahere:
294 /* allow flash to settle - wait 10 ms */
295 udelay_masked (10000);
296
297 if (iflag)
298 enable_interrupts ();
299
300#if 0
301 if (cflag)
302 icache_enable ();
303#endif
304 return rc;
305}
306
307/*-----------------------------------------------------------------------
308 * Copy memory to flash
309 */
310
311volatile static int write_word (flash_info_t * info, ulong dest,
312 ulong data)
313{
314 vu_long *addr = (vu_long *) dest;
315 ulong result;
316 int rc = ERR_OK;
317
318#if 0
319 int cflag;
320#endif
321 int iflag;
322 int chip1, chip2;
323
324 /*
325 * Check if Flash is (sufficiently) erased
326 */
327 result = *addr;
328 if ((result & data) != data)
329 return ERR_NOT_ERASED;
330
331 /*
332 * Disable interrupts which might cause a timeout
333 * here. Remember that our exception vectors are
334 * at address 0 in the flash, and we don't want a
335 * (ticker) exception to happen while the flash
336 * chip is in programming mode.
337 */
338#if 0
339 cflag = icache_status ();
340 icache_disable ();
341#endif
342 iflag = disable_interrupts ();
343
wdenkf682e422002-10-26 16:57:25 +0000344 *addr = CMD_PROGRAM;
345 *addr = data;
346
347 /* arm simple, non interrupt dependent timer */
348 reset_timer_masked ();
349
350 /* wait until flash is ready */
351 chip1 = chip2 = 0;
352 do {
353 result = *addr;
354
355 /* check timeout */
356 if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
357 chip1 = ERR | TMO;
358 break;
359 }
360 if (!chip1 && ((result & 0x80) == (data & 0x80)))
361 chip1 = READY;
362
363 if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
364 result = *addr;
365
366 if ((result & 0x80) == (data & 0x80))
367 chip1 = READY;
368 else
369 chip1 = ERR;
370 }
371
372 if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16))))
373 chip2 = READY;
374
375 if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR)) {
376 result = *addr;
377
378 if ((result & (0x80 << 16)) == (data & (0x80 << 16)))
379 chip2 = READY;
380 else
381 chip2 = ERR;
382 }
383
384 } while (!chip1 || !chip2);
385
386 *addr = CMD_READ_ARRAY;
387
388 if (chip1 == ERR || chip2 == ERR || *addr != data)
389 rc = ERR_PROG_ERROR;
390
391 if (iflag)
392 enable_interrupts ();
393
394#if 0
395 if (cflag)
396 icache_enable ();
397#endif
398
399 return rc;
400}
401
402/*-----------------------------------------------------------------------
403 * Copy memory to flash.
404 */
405
406int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
407{
408 ulong cp, wp, data;
409 int l;
410 int i, rc;
411
wdenkb4757ce2003-11-17 21:45:27 +0000412 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
413 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
414 MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
415
wdenkf682e422002-10-26 16:57:25 +0000416 wp = (addr & ~3); /* get lower word aligned address */
417
418 /*
419 * handle unaligned start bytes
420 */
421 if ((l = addr - wp) != 0) {
422 data = 0;
423 for (i = 0, cp = wp; i < l; ++i, ++cp) {
424 data = (data >> 8) | (*(uchar *) cp << 24);
425 }
426 for (; i < 4 && cnt > 0; ++i) {
427 data = (data >> 8) | (*src++ << 24);
428 --cnt;
429 ++cp;
430 }
431 for (; cnt == 0 && i < 4; ++i, ++cp) {
432 data = (data >> 8) | (*(uchar *) cp << 24);
433 }
434
435 if ((rc = write_word (info, wp, data)) != 0) {
wdenkb4757ce2003-11-17 21:45:27 +0000436 goto Done;
wdenkf682e422002-10-26 16:57:25 +0000437 }
438 wp += 4;
439 }
440
441 /*
442 * handle word aligned part
443 */
444 while (cnt >= 4) {
wdenkf07771c2003-05-28 08:06:31 +0000445 if (((ulong)src) & 0x3) {
446 for (i = 0; i < 4; i++) {
447 ((char *)&data)[i] = ((vu_char *)src)[i];
448 }
449 }
450 else {
451 data = *((vu_long *) src);
452 }
wdenk8bde7f72003-06-27 21:31:46 +0000453
wdenkf682e422002-10-26 16:57:25 +0000454 if ((rc = write_word (info, wp, data)) != 0) {
wdenkb4757ce2003-11-17 21:45:27 +0000455 goto Done;
wdenkf682e422002-10-26 16:57:25 +0000456 }
457 src += 4;
458 wp += 4;
459 cnt -= 4;
460 }
461
462 if (cnt == 0) {
wdenkb4757ce2003-11-17 21:45:27 +0000463 rc = ERR_OK;
464 goto Done;
wdenkf682e422002-10-26 16:57:25 +0000465 }
466
467 /*
468 * handle unaligned tail bytes
469 */
470 data = 0;
471 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
472 data = (data >> 8) | (*src++ << 24);
473 --cnt;
474 }
475 for (; i < 4; ++i, ++cp) {
476 data = (data >> 8) | (*(uchar *) cp << 24);
477 }
478
wdenkb4757ce2003-11-17 21:45:27 +0000479 rc = write_word (info, wp, data);
480
481 Done:
482
483 MEM_FLASH_ADDR = CMD_UNLOCK_BYPASS_RES1;
484 MEM_FLASH_ADDR = CMD_UNLOCK_BYPASS_RES2;
485
486 return (rc);
wdenkf682e422002-10-26 16:57:25 +0000487}
wdenk6069ff22003-02-28 00:49:47 +0000488
489/*-----------------------------------------------------------------------
490 */
491
492static ulong flash_get_size (vu_long *addr, flash_info_t *info)
493{
494 ulong value;
495
496 /* Write auto select command sequence and read Manufacturer ID */
497 addr[0x0555] = CMD_UNLOCK1;
498 addr[0x02AA] = CMD_UNLOCK2;
499 addr[0x0555] = CMD_READ_MANF_ID;
500
501 value = addr[0];
502
503 debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
504
505 switch (value) {
506 case AMD_MANUFACT:
507 info->flash_id = FLASH_MAN_AMD;
508 break;
wdenk1cb8e982003-03-06 21:55:29 +0000509 case FUJ_MANUFACT:
510 info->flash_id = FLASH_MAN_FUJ;
511 break;
wdenkefa329c2004-03-23 20:18:25 +0000512 case MX_MANUFACT:
513 info->flash_id = FLASH_MAN_MX;
514 break;
wdenk6069ff22003-02-28 00:49:47 +0000515 default:
516 info->flash_id = FLASH_UNKNOWN;
517 info->sector_count = 0;
518 info->size = 0;
519 addr[0] = 0x00FF00FF; /* restore read mode */
520 debug ("## flash_init: unknown manufacturer\n");
521 return (0); /* no or unknown flash */
522 }
523
524 value = addr[1]; /* device ID */
525
526 debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
527
528 switch (value) {
529 case AMD_ID_LV320B:
530 info->flash_id += FLASH_AM320B;
531 info->sector_count = 71;
532 info->size = 0x00800000;
533
534 addr[0] = 0x00FF00FF; /* restore read mode */
535 break; /* => 8 MB */
536
537 case AMD_ID_LV640U:
538 info->flash_id += FLASH_AM640U;
539 info->sector_count = 128;
540 info->size = 0x01000000;
541
542 addr[0] = 0x00F000F0; /* restore read mode */
543 break; /* => 16 MB */
544
wdenkefa329c2004-03-23 20:18:25 +0000545 case MX_ID_LV320B:
546 info->flash_id += FLASH_MXLV320B;
547 info->sector_count = 71;
548 info->size = 0x00800000;
549
550 addr[0] = 0x00FF00FF; /* restore read mode */
551 break; /* => 8 MB */
552
wdenk6069ff22003-02-28 00:49:47 +0000553 default:
554 debug ("## flash_init: unknown flash chip\n");
555 info->flash_id = FLASH_UNKNOWN;
556 addr[0] = 0x00FF00FF; /* restore read mode */
557 return (0); /* => no or unknown flash */
558
559 }
560
561 if (info->sector_count > CFG_MAX_FLASH_SECT) {
562 printf ("** ERROR: sector count %d > max (%d) **\n",
563 info->sector_count, CFG_MAX_FLASH_SECT);
564 info->sector_count = CFG_MAX_FLASH_SECT;
565 }
566
567 return (info->size);
568}