Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_CPU_INIT=y |
| 3 | CONFIG_SYS_THUMB_BUILD=y |
| 4 | CONFIG_ARCH_MVEBU=y |
| 5 | CONFIG_TEXT_BASE=0x00800000 |
| 6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 8 | CONFIG_NR_DRAM_BANKS=2 |
| 9 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 10 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 |
| 11 | CONFIG_TARGET_CLEARFOG=y |
| 12 | CONFIG_ENV_SECT_SIZE=0x10000 |
| 13 | CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 14 | CONFIG_SPL_SERIAL=y |
| 15 | CONFIG_SPL_STACK=0x4002c000 |
Tom Rini | 867e16a | 2024-11-12 13:45:12 -0600 | [diff] [blame] | 16 | CONFIG_SPL_TEXT_BASE=0x40000030 |
Tom Rini | 18e791c | 2024-04-22 17:24:09 -0600 | [diff] [blame] | 17 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 18 | CONFIG_SPL_BSS_START_ADDR=0x40023000 |
| 19 | CONFIG_SPL_BSS_MAX_SIZE=0x4000 |
Tom Rini | d892702 | 2024-10-08 09:18:32 -0600 | [diff] [blame] | 20 | CONFIG_SYS_LOAD_ADDR=0x800000 |
| 21 | CONFIG_SF_DEFAULT_BUS=1 |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 22 | CONFIG_SPL=y |
| 23 | CONFIG_DEBUG_UART_BASE=0xf1012000 |
| 24 | CONFIG_DEBUG_UART_CLOCK=250000000 |
Tom Rini | c960c0f | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 25 | CONFIG_PCI=y |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 26 | CONFIG_DEBUG_UART=y |
| 27 | CONFIG_AHCI=y |
| 28 | CONFIG_DISTRO_DEFAULTS=y |
| 29 | CONFIG_BOOTDELAY=3 |
| 30 | CONFIG_USE_PREBOOT=y |
| 31 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| 32 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 33 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 34 | CONFIG_SPL_MAX_SIZE=0x22fd0 |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 35 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| 36 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 37 | CONFIG_SPL_I2C=y |
| 38 | CONFIG_SYS_MAXARGS=32 |
| 39 | CONFIG_CMD_TLV_EEPROM=y |
| 40 | CONFIG_SPL_CMD_TLV_EEPROM=y |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 41 | CONFIG_CMD_GPIO=y |
| 42 | CONFIG_CMD_I2C=y |
| 43 | CONFIG_CMD_MMC=y |
| 44 | CONFIG_CMD_PCI=y |
| 45 | CONFIG_CMD_SPI=y |
| 46 | CONFIG_CMD_USB=y |
| 47 | CONFIG_CMD_TFTPPUT=y |
| 48 | CONFIG_CMD_CACHE=y |
| 49 | CONFIG_CMD_TIME=y |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 50 | CONFIG_ENV_OVERWRITE=y |
| 51 | CONFIG_ENV_MIN_ENTRIES=128 |
| 52 | CONFIG_ARP_TIMEOUT=200 |
| 53 | CONFIG_NET_RETRY_COUNT=50 |
| 54 | CONFIG_NET_RANDOM_ETHADDR=y |
| 55 | CONFIG_SPL_OF_TRANSLATE=y |
Patrick Rudolph | 1289c7c | 2024-10-23 15:20:00 +0200 | [diff] [blame] | 56 | CONFIG_AHCI_GENERIC=y |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 57 | CONFIG_DM_PCA953X=y |
| 58 | CONFIG_DM_I2C=y |
| 59 | CONFIG_SYS_I2C_MVTWSI=y |
| 60 | CONFIG_I2C_EEPROM=y |
| 61 | CONFIG_SPL_I2C_EEPROM=y |
| 62 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 63 | CONFIG_MMC_SDHCI=y |
| 64 | CONFIG_MMC_SDHCI_SDMA=y |
| 65 | CONFIG_MMC_SDHCI_MV=y |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 66 | CONFIG_SPI_FLASH_WINBOND=y |
| 67 | CONFIG_SPI_FLASH_MTD=y |
Marek Vasut | 6610375 | 2024-05-31 18:47:17 +0200 | [diff] [blame] | 68 | CONFIG_PHY_ANEG_TIMEOUT=8000 |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 69 | CONFIG_PHY_MARVELL=y |
| 70 | CONFIG_PHY_GIGE=y |
| 71 | CONFIG_MVNETA=y |
| 72 | CONFIG_MII=y |
| 73 | CONFIG_MVMDIO=y |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 74 | CONFIG_PCI_MVEBU=y |
Martin Rowe | 3f92f48 | 2023-03-25 10:02:44 +1000 | [diff] [blame] | 75 | CONFIG_SPL_DEBUG_UART_BASE=0xd0012000 |
| 76 | CONFIG_DEBUG_UART_SHIFT=2 |
| 77 | CONFIG_SYS_NS16550=y |
| 78 | CONFIG_KIRKWOOD_SPI=y |
| 79 | CONFIG_USB=y |
| 80 | CONFIG_USB_XHCI_HCD=y |