blob: 8108be97bab08ec75128853ca07e4c65253d98f6 [file] [log] [blame]
Chen-Yu Tsai2b679f92014-10-04 20:37:26 +08001/*
2 * (C) Copyright 2014
3 * Chen-Yu Tsai <wens@csie.org>
4 *
5 * Watchdog register definitions
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef _SUNXI_WATCHDOG_H_
11#define _SUNXI_WATCHDOG_H_
12
13#define WDT_CTRL_RESTART (0x1 << 0)
14#define WDT_CTRL_KEY (0x0a57 << 1)
Chen-Yu Tsai78c396a2014-10-04 20:37:28 +080015
Ian Campbelled41e622014-10-24 21:20:47 +010016#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I)
Chen-Yu Tsai78c396a2014-10-04 20:37:28 +080017
Chen-Yu Tsai2b679f92014-10-04 20:37:26 +080018#define WDT_MODE_EN (0x1 << 0)
19#define WDT_MODE_RESET_EN (0x1 << 1)
20
21struct sunxi_wdog {
22 u32 ctl; /* 0x00 */
23 u32 mode; /* 0x04 */
24 u32 res[2];
25};
26
Chen-Yu Tsai78c396a2014-10-04 20:37:28 +080027#else
28
29#define WDT_CFG_RESET (0x1)
30#define WDT_MODE_EN (0x1)
31
32struct sunxi_wdog {
33 u32 irq_en; /* 0x00 */
34 u32 irq_sta; /* 0x04 */
35 u32 res1[2];
36 u32 ctl; /* 0x10 */
37 u32 cfg; /* 0x14 */
38 u32 mode; /* 0x18 */
39 u32 res2;
40};
41
42#endif
43
Chen-Yu Tsai2b679f92014-10-04 20:37:26 +080044#endif /* _SUNXI_WATCHDOG_H_ */