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wdenk7a8e9bed2003-05-31 18:35:21 +00001/*
2 * (C) Copyright 2002
3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
wdenk8bde7f72003-06-27 21:31:46 +000024#include <common.h>
25#include <pci.h>
26#include <asm/io.h>
27#include <asm/pci.h>
wdenk7a8e9bed2003-05-31 18:35:21 +000028
29#ifdef CONFIG_PCI
30#undef PCI_ROM_SCAN_VERBOSE
31
wdenk8bde7f72003-06-27 21:31:46 +000032int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
wdenk7a8e9bed2003-05-31 18:35:21 +000033{
34 struct pci_controller *hose;
35 int res = -1;
36 int i;
wdenk8bde7f72003-06-27 21:31:46 +000037
wdenk7a8e9bed2003-05-31 18:35:21 +000038 u32 rom_addr;
39 u32 addr_reg;
40 u32 size;
wdenk8bde7f72003-06-27 21:31:46 +000041
wdenk7a8e9bed2003-05-31 18:35:21 +000042 u16 vendor;
43 u16 device;
44 u32 class_code;
45
46 hose = pci_bus_to_hose(PCI_BUS(dev));
47#if 0
48 printf("pci_shadow_rom() asked to shadow device %x to %x\n",
49 dev, (u32)dest);
wdenk8bde7f72003-06-27 21:31:46 +000050#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000051 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
52 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
53 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
wdenk8bde7f72003-06-27 21:31:46 +000054
Wolfgang Denk53677ef2008-05-20 16:00:29 +020055 class_code &= 0xffffff00;
wdenk7a8e9bed2003-05-31 18:35:21 +000056 class_code >>= 8;
57
wdenk8bde7f72003-06-27 21:31:46 +000058#if 0
wdenk7a8e9bed2003-05-31 18:35:21 +000059 printf("PCI Header Vendor %04x device %04x class %06x\n",
60 vendor, device, class_code);
wdenk8bde7f72003-06-27 21:31:46 +000061#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000062 /* Enable the rom addess decoder */
Graeme Russed3afaf2009-08-23 12:59:50 +100063 pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
wdenk7a8e9bed2003-05-31 18:35:21 +000064 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
65
66 if (!addr_reg) {
67 /* register unimplemented */
68 printf("pci_chadow_rom: device do not seem to have a rom\n");
69 return -1;
70 }
wdenk8bde7f72003-06-27 21:31:46 +000071
72 size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1;
73
74#if 0
wdenk7a8e9bed2003-05-31 18:35:21 +000075 printf("ROM is %d bytes\n", size);
wdenk8bde7f72003-06-27 21:31:46 +000076#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000077 rom_addr = pci_get_rom_window(hose, size);
wdenk8bde7f72003-06-27 21:31:46 +000078#if 0
wdenk7a8e9bed2003-05-31 18:35:21 +000079 printf("ROM mapped at %x \n", rom_addr);
wdenk8bde7f72003-06-27 21:31:46 +000080#endif
81 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
wdenk7a8e9bed2003-05-31 18:35:21 +000082 pci_phys_to_mem(dev, rom_addr)
83 |PCI_ROM_ADDRESS_ENABLE);
84
85
wdenk7a8e9bed2003-05-31 18:35:21 +000086 for (i=rom_addr;i<rom_addr+size; i+=512) {
wdenk8bde7f72003-06-27 21:31:46 +000087
88
wdenk7a8e9bed2003-05-31 18:35:21 +000089 if (readw(i) == 0xaa55) {
90 u32 pci_data;
91#ifdef PCI_ROM_SCAN_VERBOSE
92 printf("ROM signature found\n");
wdenk8bde7f72003-06-27 21:31:46 +000093#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000094 pci_data = readw(0x18+i);
95 pci_data += i;
wdenk8bde7f72003-06-27 21:31:46 +000096
wdenk7a8e9bed2003-05-31 18:35:21 +000097 if (0==memcmp((void*)pci_data, "PCIR", 4)) {
wdenk8bde7f72003-06-27 21:31:46 +000098#ifdef PCI_ROM_SCAN_VERBOSE
wdenk7a8e9bed2003-05-31 18:35:21 +000099 printf("Fount PCI rom image at offset %d\n", i-rom_addr);
100 printf("Vendor %04x device %04x class %06x\n",
101 readw(pci_data+4), readw(pci_data+6),
102 readl(pci_data+0x0d)&0xffffff);
wdenk8bde7f72003-06-27 21:31:46 +0000103 printf("%s\n",
wdenk7a8e9bed2003-05-31 18:35:21 +0000104 (readw(pci_data+0x15) &0x80)?
105 "Last image":"More images follow");
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200106 switch (readb(pci_data+0x14)) {
wdenk7a8e9bed2003-05-31 18:35:21 +0000107 case 0:
108 printf("X86 code\n");
109 break;
110 case 1:
111 printf("Openfirmware code\n");
112 break;
113 case 2:
114 printf("PARISC code\n");
115 break;
116 }
117 printf("Image size %d\n", readw(pci_data+0x10) * 512);
wdenk8bde7f72003-06-27 21:31:46 +0000118#endif
wdenk7a8e9bed2003-05-31 18:35:21 +0000119 /* FixMe: I think we should compare the class code
120 * bytes as well but I have no reference on the
121 * exact order of these bytes in the PCI ROM header */
wdenk8bde7f72003-06-27 21:31:46 +0000122 if (readw(pci_data+4) == vendor &&
wdenk7a8e9bed2003-05-31 18:35:21 +0000123 readw(pci_data+6) == device &&
124 /* (readl(pci_data+0x0d)&0xffffff) == class_code && */
125 readb(pci_data+0x14) == 0 /* x86 code image */ ) {
wdenk8bde7f72003-06-27 21:31:46 +0000126#ifdef PCI_ROM_SCAN_VERBOSE
wdenk7a8e9bed2003-05-31 18:35:21 +0000127 printf("Suitable ROM image found, copying\n");
wdenk8bde7f72003-06-27 21:31:46 +0000128#endif
wdenk7a8e9bed2003-05-31 18:35:21 +0000129 memmove(dest, (void*)rom_addr, readw(pci_data+0x10) * 512);
130 res = 0;
131 break;
wdenk8bde7f72003-06-27 21:31:46 +0000132
wdenk7a8e9bed2003-05-31 18:35:21 +0000133 }
134 if (readw(pci_data+0x15) &0x80) {
135 break;
136 }
137 }
138 }
wdenk8bde7f72003-06-27 21:31:46 +0000139
wdenk7a8e9bed2003-05-31 18:35:21 +0000140 }
wdenk8bde7f72003-06-27 21:31:46 +0000141
wdenk7a8e9bed2003-05-31 18:35:21 +0000142#ifdef PCI_ROM_SCAN_VERBOSE
143 if (res) {
144 printf("No suitable image found\n");
145 }
wdenk8bde7f72003-06-27 21:31:46 +0000146#endif
wdenk7a8e9bed2003-05-31 18:35:21 +0000147 /* disable PAR register and PCI device ROM address devocer */
148 pci_remove_rom_window(hose, rom_addr);
wdenk8bde7f72003-06-27 21:31:46 +0000149
wdenk7a8e9bed2003-05-31 18:35:21 +0000150 pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
151
152 return res;
153}
154
155#endif