Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Seco S.r.l |
| 3 | * |
| 4 | * Configuration settings for the Seco Boards. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
| 12 | #include "mx6_common.h" |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 13 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 14 | #define CONFIG_BOARD_REVISION_TAG |
| 15 | |
| 16 | /* Size of malloc() pool */ |
| 17 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
| 18 | |
| 19 | #define CONFIG_BOARD_EARLY_INIT_F |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 20 | |
| 21 | #define CONFIG_MXC_UART |
| 22 | #define CONFIG_MXC_UART_BASE UART2_BASE |
| 23 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 24 | /* Command definition */ |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 25 | #define CONFIG_CMD_BMODE |
| 26 | #define CONFIG_CMD_SETEXPR |
| 27 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 28 | #define CONFIG_SYS_MEMTEST_START 0x10000000 |
| 29 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 30 | |
| 31 | /* MMC Configuration */ |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 32 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| 33 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 34 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 35 | /* Ethernet Configuration */ |
| 36 | #define CONFIG_CMD_PING |
| 37 | #define CONFIG_CMD_DHCP |
| 38 | #define CONFIG_CMD_MII |
| 39 | #define CONFIG_CMD_NET |
| 40 | #define CONFIG_FEC_MXC |
| 41 | #define CONFIG_MII |
| 42 | #define IMX_FEC_BASE ENET_BASE_ADDR |
| 43 | #define CONFIG_FEC_XCV_TYPE RGMII |
| 44 | #define CONFIG_ETHPRIME "FEC" |
| 45 | #define CONFIG_FEC_MXC_PHYADDR 6 |
| 46 | #define CONFIG_PHYLIB |
| 47 | #define CONFIG_PHY_MICREL |
| 48 | |
| 49 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 50 | "netdev=eth0\0" \ |
| 51 | "ethprime=FEC0\0" \ |
| 52 | "netdev=eth0\0" \ |
| 53 | "ethprime=FEC0\0" \ |
| 54 | "uboot=u-boot.bin\0" \ |
| 55 | "kernel=uImage\0" \ |
| 56 | "nfsroot=/opt/eldk/arm\0" \ |
| 57 | "ip_local=10.0.0.5::10.0.0.1:255.255.255.0::eth0:off\0" \ |
| 58 | "ip_server=10.0.0.1\0" \ |
| 59 | "nfs_path=/targetfs \0" \ |
| 60 | "memory=mem=1024M\0" \ |
| 61 | "bootdev=mmc dev 0; ext2load mmc 0:1\0" \ |
| 62 | "root=root=/dev/mmcblk0p1\0" \ |
| 63 | "option=rootwait rw fixrtc rootflags=barrier=1\0" \ |
| 64 | "cpu_freq=arm_freq=996\0" \ |
| 65 | "setbootargs=setenv bootargs console=ttymxc1,115200 ${root}" \ |
| 66 | " ${option} ${memory} ${cpu_freq}\0" \ |
| 67 | "setbootargs_nfs=setenv bootargs console=ttymxc1,115200" \ |
| 68 | " root=/dev/nfs nfsroot=${ip_server}:${nfs_path}" \ |
| 69 | " nolock,wsize=4096,rsize=4096 ip=:::::eth0:dhcp" \ |
| 70 | " ${memory} ${cpu_freq}\0" \ |
| 71 | "setbootdev=setenv boot_dev ${bootdev} 10800000 /boot/uImage\0" \ |
| 72 | "bootcmd=run setbootargs; run setbootdev; run boot_dev;" \ |
| 73 | " bootm 0x10800000\0" \ |
| 74 | "stdin=serial\0" \ |
| 75 | "stdout=serial\0" \ |
| 76 | "stderr=serial\0" |
| 77 | |
| 78 | |
| 79 | /* Miscellaneous configurable options */ |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 80 | #define CONFIG_SYS_PROMPT "SECO MX6Q uQ7 U-Boot > " |
| 81 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 82 | /* Print Buffer Size */ |
| 83 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 84 | sizeof(CONFIG_SYS_PROMPT) + 16) |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 85 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 86 | #define CONFIG_SYS_HZ 1000 |
| 87 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 88 | /* Physical Memory Map */ |
| 89 | #define CONFIG_NR_DRAM_BANKS 1 |
| 90 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 91 | #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) |
| 92 | |
| 93 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 94 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 95 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 96 | |
| 97 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 98 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 99 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 100 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 101 | |
Peter Robinson | 056845c | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 102 | /* Environment organization */ |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 103 | #define CONFIG_ENV_SIZE (8 * 1024) |
| 104 | |
| 105 | #if defined(CONFIG_ENV_IS_IN_MMC) |
| 106 | #define CONFIG_ENV_OFFSET (6 * 128 * 1024) |
| 107 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 108 | #define CONFIG_DYNAMIC_MMC_DEVNO |
| 109 | #endif |
| 110 | |
Boris BREZILLON | 058d231 | 2015-03-04 13:13:05 +0100 | [diff] [blame] | 111 | #endif /* __CONFIG_H */ |