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gerrit.cesnet.cz / github / trini / u-boot / eca86fad3d823c3c1e7e78b07752aa6a10e35283 / . / board / nvidia / seaboard / seaboard.c
blob: ce2db40f9ebf2351af0975f1036242377327a752 [file] [log] [blame]
Tom Warrenf4ef6662011-04-14 12:09:41 +0000[diff] [blame]1/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf4ef6662011-04-14 12:09:41 +0000[diff] [blame]6 */
7
8#include <common.h>
9#include <asm/io.h>
Tom Warren150c2492012-09-19 15:50:56 -0700[diff] [blame]10#include <asm/arch/tegra.h>
Simon Glassca280902012-01-11 12:42:28 +0000[diff] [blame]11#include <asm/arch/clock.h>
12#include <asm/arch/funcmux.h>
Stephen Warrena2ab6b72012-10-22 06:19:36 +0000[diff] [blame]13#include <asm/arch/gpio.h>
Stephen Warrenae036612011-10-31 06:51:35 +0000[diff] [blame]14#include <asm/arch/pinmux.h>
Tom Warrenccf79882011-09-21 12:40:07 +0000[diff] [blame]15#include <asm/gpio.h>
Tom Warrenf4ef6662011-04-14 12:09:41 +0000[diff] [blame]16
Simon Glassa04eba92011-11-05 04:46:51 +0000[diff] [blame]17/* TODO: Remove this code when the SPI switch is working */
Allen Martin90006522013-03-16 18:58:02 +0000[diff] [blame]18#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
Lucas Stach0cd10c72012-09-25 20:21:14 +0000[diff] [blame]19void gpio_early_init_uart(void)
Stephen Warrend5ef19b2011-10-31 06:51:37 +0000[diff] [blame]20{
Stephen Warrena2ab6b72012-10-22 06:19:36 +0000[diff] [blame]21 /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
22#ifndef CONFIG_SPL_BUILD
23 gpio_request(GPIO_PI3, NULL);
24#endif
25 gpio_direction_output(GPIO_PI3, 0);
Stephen Warrend5ef19b2011-10-31 06:51:37 +0000[diff] [blame]26}
Simon Glassa04eba92011-11-05 04:46:51 +0000[diff] [blame]27#endif
Stephen Warrend5ef19b2011-10-31 06:51:37 +0000[diff] [blame]28
Tom Warren3f82d892012-05-22 11:44:48 +0000[diff] [blame]29#ifdef CONFIG_TEGRA_MMC
Tom Warrenccf79882011-09-21 12:40:07 +0000[diff] [blame]30/*
Stephen Warrenae036612011-10-31 06:51:35 +0000[diff] [blame]31 * Routine: pin_mux_mmc
32 * Description: setup the pin muxes/tristate values for the SDMMC(s)
33 */
Tom Warrenc9aa8312013-02-21 12:31:30 +0000[diff] [blame]34void pin_mux_mmc(void)
Stephen Warrenae036612011-10-31 06:51:35 +0000[diff] [blame]35{
Simon Glassca280902012-01-11 12:42:28 +0000[diff] [blame]36 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
37 funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
Stephen Warrenae036612011-10-31 06:51:35 +0000[diff] [blame]38
39 /* For power GPIO PI6 */
Stephen Warren70ad3752014-03-21 12:28:58 -0600[diff] [blame]40 pinmux_tristate_disable(PMUX_PINGRP_ATA);
Stephen Warrenae036612011-10-31 06:51:35 +0000[diff] [blame]41 /* For CD GPIO PI5 */
Stephen Warren70ad3752014-03-21 12:28:58 -0600[diff] [blame]42 pinmux_tristate_disable(PMUX_PINGRP_ATC);
Stephen Warrenae036612011-10-31 06:51:35 +0000[diff] [blame]43}
Tom Warrenccf79882011-09-21 12:40:07 +0000[diff] [blame]44#endif
Simon Glassf10393e2012-02-27 10:52:50 +0000[diff] [blame]45
46void pin_mux_usb(void)
47{
48 /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */
Stephen Warren70ad3752014-03-21 12:28:58 -0600[diff] [blame]49 pinmux_tristate_disable(PMUX_PINGRP_SLXK);
Simon Glassf10393e2012-02-27 10:52:50 +0000[diff] [blame]50}