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Sandeep Paulraj840f8922010-12-28 15:43:16 -05001/*
2 * LSI ET1011C PHY Driver for TI DaVinci(TMS320DM6467) board.
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <common.h>
22#include <net.h>
23#include <miiphy.h>
24#include <asm/arch/emac_defs.h>
Ilya Yanok7c587d32011-11-28 06:37:29 +000025#include "../../../../../drivers/net/davinci_emac.h"
Sandeep Paulraj840f8922010-12-28 15:43:16 -050026
27#ifdef CONFIG_DRIVER_TI_EMAC
28
29#ifdef CONFIG_CMD_NET
30
31/* LSI PHYSICAL LAYER TRANSCEIVER ET1011C */
32
33#define MII_PHY_CONFIG_REG 22
34
35/* PHY Config bits */
36#define PHY_SYS_CLK_EN (1 << 4)
37
38int et1011c_get_link_speed(int phy_addr)
39{
40 u_int16_t data;
41
42 if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) {
Manjunath Hadlifb1d6332011-10-13 03:40:55 +000043 davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data);
Sandeep Paulraj840f8922010-12-28 15:43:16 -050044 /* Enable 125MHz clock sourced from PHY */
Manjunath Hadlifb1d6332011-10-13 03:40:55 +000045 davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG,
Sandeep Paulraj840f8922010-12-28 15:43:16 -050046 data | PHY_SYS_CLK_EN);
47 return (1);
48 }
49 return (0);
50}
51
52#endif /* CONFIG_CMD_NET */
53
54#endif /* CONFIG_DRIVER_ETHER */