blob: 8966399f7a6b662528814d75d3f75fff179abfb7 [file] [log] [blame]
wdenk2cbe5712004-10-10 17:05:18 +00001/*
wdenk9d5028c2004-11-21 00:06:33 +00002 * (C) Copyright 2003-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenk2cbe5712004-10-10 17:05:18 +00004 *
wdenk9d5028c2004-11-21 00:06:33 +00005 * (C) Copyright 2004
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * Modified for the CMC PU2 by (C) Copyright 2004 Gary Jennejohn
9 * garyj@denx.de
wdenk2cbe5712004-10-10 17:05:18 +000010 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#include <common.h>
31
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020032#ifndef CONFIG_ENV_ADDR
33#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
wdenk45ea3fc2004-12-14 23:28:24 +000034#endif
35
wdenk9d5028c2004-11-21 00:06:33 +000036flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
wdenk2cbe5712004-10-10 17:05:18 +000037
wdenk9d5028c2004-11-21 00:06:33 +000038#define FLASH_CYCLE1 0x0555
wdenk25d67122004-12-10 11:40:40 +000039#define FLASH_CYCLE2 0x02AA
wdenk2cbe5712004-10-10 17:05:18 +000040
41/*-----------------------------------------------------------------------
wdenk9d5028c2004-11-21 00:06:33 +000042 * Functions
wdenk2cbe5712004-10-10 17:05:18 +000043 */
wdenk08f27272004-12-19 21:39:27 +000044static ulong flash_get_size(vu_short *addr, flash_info_t *info);
wdenk9d5028c2004-11-21 00:06:33 +000045static void flash_reset(flash_info_t *info);
wdenk08f27272004-12-19 21:39:27 +000046static int write_word_amd(flash_info_t *info, vu_short *dest, ushort data);
wdenk9d5028c2004-11-21 00:06:33 +000047static flash_info_t *flash_get_info(ulong base);
48
49/*-----------------------------------------------------------------------
50 * flash_init()
51 *
52 * sets up flash_info and returns size of FLASH (bytes)
53 */
54unsigned long flash_init (void)
wdenk2cbe5712004-10-10 17:05:18 +000055{
wdenk9d5028c2004-11-21 00:06:33 +000056 unsigned long size = 0;
57 ulong flashbase = CFG_FLASH_BASE;
wdenk2cbe5712004-10-10 17:05:18 +000058
wdenk9d5028c2004-11-21 00:06:33 +000059 /* Init: no FLASHes known */
60 memset(&flash_info[0], 0, sizeof(flash_info_t));
wdenk2cbe5712004-10-10 17:05:18 +000061
wdenk08f27272004-12-19 21:39:27 +000062 flash_info[0].size = flash_get_size((vu_short *)flashbase, &flash_info[0]);
wdenk2cbe5712004-10-10 17:05:18 +000063
wdenk9d5028c2004-11-21 00:06:33 +000064 size = flash_info[0].size;
wdenk2cbe5712004-10-10 17:05:18 +000065
wdenk9d5028c2004-11-21 00:06:33 +000066#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
67 /* monitor protection ON by default */
68 flash_protect(FLAG_PROTECT_SET,
69 CFG_MONITOR_BASE,
70 CFG_MONITOR_BASE+monitor_flash_len-1,
71 flash_get_info(CFG_MONITOR_BASE));
72#endif
wdenk2cbe5712004-10-10 17:05:18 +000073
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020074#ifdef CONFIG_ENV_IS_IN_FLASH
wdenk9d5028c2004-11-21 00:06:33 +000075 /* ENV protection ON by default */
76 flash_protect(FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020077 CONFIG_ENV_ADDR,
78 CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1,
79 flash_get_info(CONFIG_ENV_ADDR));
wdenk9d5028c2004-11-21 00:06:33 +000080#endif
wdenk2cbe5712004-10-10 17:05:18 +000081
wdenk9d5028c2004-11-21 00:06:33 +000082 return size ? size : 1;
wdenk2cbe5712004-10-10 17:05:18 +000083}
84
85/*-----------------------------------------------------------------------
86 */
wdenk9d5028c2004-11-21 00:06:33 +000087static void flash_reset(flash_info_t *info)
88{
wdenk08f27272004-12-19 21:39:27 +000089 vu_short *base = (vu_short *)(info->start[0]);
wdenk9d5028c2004-11-21 00:06:33 +000090
91 /* Put FLASH back in read mode */
92 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
wdenk08f27272004-12-19 21:39:27 +000093 *base = 0x00FF; /* Intel Read Mode */
wdenk9d5028c2004-11-21 00:06:33 +000094 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
wdenk08f27272004-12-19 21:39:27 +000095 *base = 0x00F0; /* AMD Read Mode */
wdenk9d5028c2004-11-21 00:06:33 +000096}
97
98/*-----------------------------------------------------------------------
99 */
100
101static flash_info_t *flash_get_info(ulong base)
102{
103 int i;
104 flash_info_t * info;
105
106 info = NULL;
107 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
108 info = & flash_info[i];
109 if (info->size && info->start[0] <= base &&
110 base <= info->start[0] + info->size - 1)
111 break;
112 }
113
114 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
115}
116
117/*-----------------------------------------------------------------------
118 */
119
120void flash_print_info (flash_info_t *info)
wdenk2cbe5712004-10-10 17:05:18 +0000121{
122 int i;
123
wdenk9d5028c2004-11-21 00:06:33 +0000124 if (info->flash_id == FLASH_UNKNOWN) {
125 printf ("missing or unknown FLASH type\n");
126 return;
127 }
128
wdenk2cbe5712004-10-10 17:05:18 +0000129 switch (info->flash_id & FLASH_VENDMASK) {
wdenk9d5028c2004-11-21 00:06:33 +0000130 case FLASH_MAN_AMD: printf ("AMD "); break;
131 case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
132 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
133 case FLASH_MAN_SST: printf ("SST "); break;
134 case FLASH_MAN_STM: printf ("STM "); break;
135 case FLASH_MAN_INTEL: printf ("INTEL "); break;
136 default: printf ("Unknown Vendor "); break;
wdenk2cbe5712004-10-10 17:05:18 +0000137 }
138
139 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk9d5028c2004-11-21 00:06:33 +0000140 case FLASH_S29GL064M:
141 printf ("S29GL064M-R6 (64Mbit, uniform sector size)\n");
wdenk2cbe5712004-10-10 17:05:18 +0000142 break;
143 default:
144 printf ("Unknown Chip Type\n");
wdenk2cbe5712004-10-10 17:05:18 +0000145 break;
146 }
147
148 printf (" Size: %ld MB in %d Sectors\n",
wdenk9d5028c2004-11-21 00:06:33 +0000149 info->size >> 20,
150 info->sector_count);
wdenk2cbe5712004-10-10 17:05:18 +0000151
152 printf (" Sector Start Addresses:");
wdenk9d5028c2004-11-21 00:06:33 +0000153
154 for (i=0; i<info->sector_count; ++i) {
wdenk2cbe5712004-10-10 17:05:18 +0000155 if ((i % 5) == 0) {
156 printf ("\n ");
157 }
wdenk9d5028c2004-11-21 00:06:33 +0000158 printf (" %08lX%s",
159 info->start[i],
wdenk2cbe5712004-10-10 17:05:18 +0000160 info->protect[i] ? " (RO)" : " ");
161 }
162 printf ("\n");
wdenk9d5028c2004-11-21 00:06:33 +0000163 return;
wdenk2cbe5712004-10-10 17:05:18 +0000164}
165
166/*-----------------------------------------------------------------------
167 */
168
wdenk9d5028c2004-11-21 00:06:33 +0000169/*
170 * The following code cannot be run from FLASH!
171 */
172
wdenk08f27272004-12-19 21:39:27 +0000173ulong flash_get_size (vu_short *addr, flash_info_t *info)
wdenk2cbe5712004-10-10 17:05:18 +0000174{
wdenk9d5028c2004-11-21 00:06:33 +0000175 int i;
wdenk08f27272004-12-19 21:39:27 +0000176 ushort value;
wdenk9d5028c2004-11-21 00:06:33 +0000177 ulong base = (ulong)addr;
wdenk2cbe5712004-10-10 17:05:18 +0000178
wdenk08f27272004-12-19 21:39:27 +0000179 /* Write auto select command sequence */
180 addr[FLASH_CYCLE1] = 0x00AA; /* for AMD, Intel ignores this */
181 addr[FLASH_CYCLE2] = 0x0055; /* for AMD, Intel ignores this */
182 addr[FLASH_CYCLE1] = 0x0090; /* selects Intel or AMD */
wdenk2cbe5712004-10-10 17:05:18 +0000183
wdenk08f27272004-12-19 21:39:27 +0000184 /* read Manufacturer ID */
wdenk9d5028c2004-11-21 00:06:33 +0000185 udelay(100);
wdenk08f27272004-12-19 21:39:27 +0000186 value = addr[0];
187 debug ("Manufacturer ID: %04X\n", value);
wdenk2cbe5712004-10-10 17:05:18 +0000188
wdenk08f27272004-12-19 21:39:27 +0000189 switch (value) {
190
191 case (AMD_MANUFACT & 0xFFFF):
wdenk45ea3fc2004-12-14 23:28:24 +0000192 debug ("Manufacturer: AMD (Spansion)\n");
wdenk9d5028c2004-11-21 00:06:33 +0000193 info->flash_id = FLASH_MAN_AMD;
194 break;
195
wdenk08f27272004-12-19 21:39:27 +0000196 case (INTEL_MANUFACT & 0xFFFF):
wdenk45ea3fc2004-12-14 23:28:24 +0000197 debug ("Manufacturer: Intel (not supported yet)\n");
wdenk9d5028c2004-11-21 00:06:33 +0000198 info->flash_id = FLASH_MAN_INTEL;
199 break;
200
201 default:
wdenk08f27272004-12-19 21:39:27 +0000202 printf ("Unknown Manufacturer ID: %04X\n", value);
wdenk9d5028c2004-11-21 00:06:33 +0000203 info->flash_id = FLASH_UNKNOWN;
204 info->sector_count = 0;
205 info->size = 0;
wdenk08f27272004-12-19 21:39:27 +0000206 goto out;
wdenk2cbe5712004-10-10 17:05:18 +0000207 }
208
wdenk08f27272004-12-19 21:39:27 +0000209 value = addr[1];
210 debug ("Device ID: %04X\n", value);
wdenk9d5028c2004-11-21 00:06:33 +0000211
wdenk08f27272004-12-19 21:39:27 +0000212 switch (addr[1]) {
213
214 case (AMD_ID_MIRROR & 0xFFFF):
wdenk45ea3fc2004-12-14 23:28:24 +0000215 debug ("Mirror Bit flash: addr[14] = %08X addr[15] = %08X\n",
wdenk9d5028c2004-11-21 00:06:33 +0000216 addr[14], addr[15]);
217
wdenk08f27272004-12-19 21:39:27 +0000218 switch(addr[14]) {
219 case (AMD_ID_GL064M_2 & 0xFFFF):
wdenk9d5028c2004-11-21 00:06:33 +0000220 if (addr[15] != (AMD_ID_GL064M_3 & 0xffff)) {
221 printf ("Chip: S29GLxxxM -> unknown\n");
222 info->flash_id = FLASH_UNKNOWN;
223 info->sector_count = 0;
224 info->size = 0;
225 } else {
wdenk45ea3fc2004-12-14 23:28:24 +0000226 debug ("Chip: S29GL064M-R6\n");
wdenk9d5028c2004-11-21 00:06:33 +0000227 info->flash_id += FLASH_S29GL064M;
228 info->sector_count = 128;
229 info->size = 0x00800000;
230 for (i = 0; i < info->sector_count; i++) {
231 info->start[i] = base;
232 base += 0x10000;
233 }
234 }
235 break; /* => 16 MB */
236 default:
237 printf ("Chip: *** unknown ***\n");
238 info->flash_id = FLASH_UNKNOWN;
239 info->sector_count = 0;
240 info->size = 0;
241 break;
242 }
243 break;
244
245 default:
wdenk08f27272004-12-19 21:39:27 +0000246 printf ("Unknown Device ID: %04X\n", value);
wdenk9d5028c2004-11-21 00:06:33 +0000247 info->flash_id = FLASH_UNKNOWN;
248 info->sector_count = 0;
249 info->size = 0;
wdenk08f27272004-12-19 21:39:27 +0000250 break;
wdenk9d5028c2004-11-21 00:06:33 +0000251 }
252
wdenk08f27272004-12-19 21:39:27 +0000253out:
wdenk9d5028c2004-11-21 00:06:33 +0000254 /* Put FLASH back in read mode */
255 flash_reset(info);
256
257 return (info->size);
258}
259
260/*-----------------------------------------------------------------------
261 */
262
263int flash_erase (flash_info_t *info, int s_first, int s_last)
264{
wdenk08f27272004-12-19 21:39:27 +0000265 vu_short *addr = (vu_short *)(info->start[0]);
wdenk25d67122004-12-10 11:40:40 +0000266 int flag, prot, sect, ssect, l_sect;
wdenke2ffd592004-12-31 09:32:47 +0000267 ulong now, last;
wdenk9d5028c2004-11-21 00:06:33 +0000268
wdenk45ea3fc2004-12-14 23:28:24 +0000269 debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
wdenk9d5028c2004-11-21 00:06:33 +0000270
271 if ((s_first < 0) || (s_first > s_last)) {
272 if (info->flash_id == FLASH_UNKNOWN) {
273 printf ("- missing\n");
274 } else {
275 printf ("- no sectors to erase\n");
wdenk45ea3fc2004-12-14 23:28:24 +0000276 }
wdenk9d5028c2004-11-21 00:06:33 +0000277 return 1;
wdenk45ea3fc2004-12-14 23:28:24 +0000278 }
wdenk9d5028c2004-11-21 00:06:33 +0000279
280 if ((info->flash_id == FLASH_UNKNOWN) ||
281 (info->flash_id > FLASH_AMD_COMP)) {
282 printf ("Can't erase unknown flash type %08lx - aborted\n",
283 info->flash_id);
284 return 1;
wdenk2cbe5712004-10-10 17:05:18 +0000285 }
286
287 prot = 0;
wdenk9d5028c2004-11-21 00:06:33 +0000288 for (sect=s_first; sect<=s_last; ++sect) {
wdenk2cbe5712004-10-10 17:05:18 +0000289 if (info->protect[sect]) {
290 prot++;
291 }
292 }
wdenk2cbe5712004-10-10 17:05:18 +0000293
wdenk9d5028c2004-11-21 00:06:33 +0000294 if (prot) {
295 printf ("- Warning: %d protected sectors will not be erased!\n",
296 prot);
297 } else {
298 printf ("\n");
299 }
300
wdenk9d5028c2004-11-21 00:06:33 +0000301 /* Disable interrupts which might cause a timeout here */
302 flag = disable_interrupts();
303
wdenk25d67122004-12-10 11:40:40 +0000304 /*
305 * Start erase on unprotected sectors.
306 * Since the flash can erase multiple sectors with one command
307 * we take advantage of that by doing the erase in chunks of
308 * 3 sectors.
309 */
310 for (sect = s_first; sect <= s_last; ) {
311 l_sect = -1;
wdenk2cbe5712004-10-10 17:05:18 +0000312
wdenk25d67122004-12-10 11:40:40 +0000313 addr[FLASH_CYCLE1] = 0x00AA;
314 addr[FLASH_CYCLE2] = 0x0055;
315 addr[FLASH_CYCLE1] = 0x0080;
316 addr[FLASH_CYCLE1] = 0x00AA;
317 addr[FLASH_CYCLE2] = 0x0055;
318
319 /* do the erase in chunks of at most 3 sectors */
320 for (ssect = 0; ssect < 3; ssect++) {
321 if ((sect + ssect) > s_last)
322 break;
323 if (info->protect[sect + ssect] == 0) { /* not protected */
wdenk08f27272004-12-19 21:39:27 +0000324 addr = (vu_short *)(info->start[sect + ssect]);
wdenk25d67122004-12-10 11:40:40 +0000325 addr[0] = 0x0030;
326 l_sect = sect + ssect;
327 }
wdenk2cbe5712004-10-10 17:05:18 +0000328 }
wdenk25d67122004-12-10 11:40:40 +0000329 /* wait at least 80us - let's wait 1 ms */
330 udelay (1000);
331
332 /*
333 * We wait for the last triggered sector
334 */
335 if (l_sect < 0)
336 goto DONE;
337
wdenk400ab712004-12-20 11:18:07 +0000338 reset_timer_masked ();
wdenke2ffd592004-12-31 09:32:47 +0000339 last = 0;
wdenk08f27272004-12-19 21:39:27 +0000340 addr = (vu_short *)(info->start[l_sect]);
wdenk25d67122004-12-10 11:40:40 +0000341 while ((addr[0] & 0x0080) != 0x0080) {
wdenk400ab712004-12-20 11:18:07 +0000342 if ((now = get_timer_masked ()) > CFG_FLASH_ERASE_TOUT) {
wdenk25d67122004-12-10 11:40:40 +0000343 printf ("Timeout\n");
344 return 1;
345 }
346 /* show that we're waiting */
347 if ((now - last) > 1000) { /* every second */
348 putc ('.');
349 last = now;
350 }
351 }
wdenk08f27272004-12-19 21:39:27 +0000352 addr = (vu_short *)info->start[0];
wdenk25d67122004-12-10 11:40:40 +0000353 addr[0] = 0x00F0; /* reset bank */
354 sect += ssect;
wdenk2cbe5712004-10-10 17:05:18 +0000355 }
356
wdenk9d5028c2004-11-21 00:06:33 +0000357 /* re-enable interrupts if necessary */
358 if (flag)
359 enable_interrupts();
wdenk2cbe5712004-10-10 17:05:18 +0000360
wdenk9d5028c2004-11-21 00:06:33 +0000361DONE:
362 /* reset to read mode */
wdenk08f27272004-12-19 21:39:27 +0000363 addr = (vu_short *)info->start[0];
wdenk25d67122004-12-10 11:40:40 +0000364 addr[0] = 0x00F0; /* reset bank */
wdenk2cbe5712004-10-10 17:05:18 +0000365
wdenk9d5028c2004-11-21 00:06:33 +0000366 printf (" done\n");
367 return 0;
wdenk2cbe5712004-10-10 17:05:18 +0000368}
369
370/*-----------------------------------------------------------------------
wdenk9d5028c2004-11-21 00:06:33 +0000371 * Copy memory to flash, returns:
372 * 0 - OK
373 * 1 - write timeout
374 * 2 - Flash not erased
wdenk2cbe5712004-10-10 17:05:18 +0000375 */
376
wdenk9d5028c2004-11-21 00:06:33 +0000377int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
wdenk2cbe5712004-10-10 17:05:18 +0000378{
379 ulong wp, data;
380 int rc;
381
382 if (addr & 1) {
383 printf ("unaligned destination not supported\n");
384 return ERR_ALIGN;
385 };
386
387 if ((int) src & 1) {
388 printf ("unaligned source not supported\n");
389 return ERR_ALIGN;
390 };
391
392 wp = addr;
393
394 while (cnt >= 2) {
wdenk08f27272004-12-19 21:39:27 +0000395 data = *((vu_short *)src);
396 if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
wdenk400ab712004-12-20 11:18:07 +0000397printf ("write_buff 1: write_word_amd() rc=%d\n", rc);
wdenk2cbe5712004-10-10 17:05:18 +0000398 return (rc);
399 }
400 src += 2;
401 wp += 2;
402 cnt -= 2;
403 }
404
wdenk9d5028c2004-11-21 00:06:33 +0000405 if (cnt == 0) {
wdenk400ab712004-12-20 11:18:07 +0000406 return (ERR_OK);
wdenk9d5028c2004-11-21 00:06:33 +0000407 }
408
wdenk2cbe5712004-10-10 17:05:18 +0000409 if (cnt == 1) {
wdenk400ab712004-12-20 11:18:07 +0000410 data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << 8);
wdenk08f27272004-12-19 21:39:27 +0000411 if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
wdenk400ab712004-12-20 11:18:07 +0000412printf ("write_buff 1: write_word_amd() rc=%d\n", rc);
wdenk2cbe5712004-10-10 17:05:18 +0000413 return (rc);
414 }
415 src += 1;
416 wp += 1;
417 cnt -= 1;
wdenk9d5028c2004-11-21 00:06:33 +0000418 }
wdenk2cbe5712004-10-10 17:05:18 +0000419
420 return ERR_OK;
421}
wdenk9d5028c2004-11-21 00:06:33 +0000422
423/*-----------------------------------------------------------------------
424 * Write a word to Flash for AMD FLASH
425 * A word is 16 or 32 bits, whichever the bus width of the flash bank
426 * (not an individual chip) is.
427 *
428 * returns:
429 * 0 - OK
430 * 1 - write timeout
431 * 2 - Flash not erased
432 */
wdenk08f27272004-12-19 21:39:27 +0000433static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data)
wdenk9d5028c2004-11-21 00:06:33 +0000434{
wdenk9d5028c2004-11-21 00:06:33 +0000435 int flag;
wdenk08f27272004-12-19 21:39:27 +0000436 vu_short *base; /* first address in flash bank */
wdenk9d5028c2004-11-21 00:06:33 +0000437
438 /* Check if Flash is (sufficiently) erased */
439 if ((*dest & data) != data) {
440 return (2);
441 }
442
wdenk08f27272004-12-19 21:39:27 +0000443 base = (vu_short *)(info->start[0]);
wdenk9d5028c2004-11-21 00:06:33 +0000444
445 /* Disable interrupts which might cause a timeout here */
446 flag = disable_interrupts();
447
wdenk08f27272004-12-19 21:39:27 +0000448 base[FLASH_CYCLE1] = 0x00AA; /* unlock */
449 base[FLASH_CYCLE2] = 0x0055; /* unlock */
450 base[FLASH_CYCLE1] = 0x00A0; /* selects program mode */
wdenk9d5028c2004-11-21 00:06:33 +0000451
452 *dest = data; /* start programming the data */
453
454 /* re-enable interrupts if necessary */
455 if (flag)
456 enable_interrupts();
457
wdenk400ab712004-12-20 11:18:07 +0000458 reset_timer_masked ();
wdenk9d5028c2004-11-21 00:06:33 +0000459
460 /* data polling for D7 */
wdenk08f27272004-12-19 21:39:27 +0000461 while ((*dest & 0x0080) != (data & 0x0080)) {
wdenk400ab712004-12-20 11:18:07 +0000462 if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
wdenk08f27272004-12-19 21:39:27 +0000463 *dest = 0x00F0; /* reset bank */
wdenk9d5028c2004-11-21 00:06:33 +0000464 return (1);
465 }
466 }
467 return (0);
468}