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wdenk4a9cbbe2002-08-27 09:48:53 +00001/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk3a473b22004-01-03 00:43:19 +000015 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk4a9cbbe2002-08-27 09:48:53 +000016 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <74xx_7xx.h>
26#include <asm/processor.h>
27
Wolfgang Denkd87080b2006-03-31 18:32:53 +020028DECLARE_GLOBAL_DATA_PTR;
29
roy zangee311212006-12-01 11:47:36 +080030extern unsigned long get_board_bus_clk (void);
roy zang4c527832006-11-02 18:49:51 +080031
wdenk4a9cbbe2002-08-27 09:48:53 +000032static const int hid1_multipliers_x_10[] = {
33 25, /* 0000 - 2.5x */
34 75, /* 0001 - 7.5x */
35 70, /* 0010 - 7x */
36 10, /* 0011 - bypass */
37 20, /* 0100 - 2x */
38 65, /* 0101 - 6.5x */
39 100, /* 0110 - 10x */
40 45, /* 0111 - 4.5x */
41 30, /* 1000 - 3x */
42 55, /* 1001 - 5.5x */
43 40, /* 1010 - 4x */
44 50, /* 1011 - 5x */
45 80, /* 1100 - 8x */
46 60, /* 1101 - 6x */
47 35, /* 1110 - 3.5x */
48 0 /* 1111 - off */
49};
50
roy zang4dbcd692006-12-04 17:54:21 +080051/* PLL_CFG[0:4] table for cpu 7448/7447A/7455/7457 */
52static const int hid1_74xx_multipliers_x_10[] = {
roy zangee311212006-12-01 11:47:36 +080053 115, /* 00000 - 11.5x */
54 170, /* 00001 - 17x */
55 75, /* 00010 - 7.5x */
56 150, /* 00011 - 15x */
57 70, /* 00100 - 7x */
58 180, /* 00101 - 18x */
59 10, /* 00110 - bypass */
60 200, /* 00111 - 20x */
61 20, /* 01000 - 2x */
62 210, /* 01001 - 21x */
63 65, /* 01010 - 6.5x */
64 130, /* 01011 - 13x */
65 85, /* 01100 - 8.5x */
roy zang4dbcd692006-12-04 17:54:21 +080066 240, /* 01101 - 24x */
roy zangee311212006-12-01 11:47:36 +080067 95, /* 01110 - 9.5x */
68 90, /* 01111 - 9x */
69 30, /* 10000 - 3x */
70 105, /* 10001 - 10.5x */
71 55, /* 10010 - 5.5x */
72 110, /* 10011 - 11x */
73 40, /* 10100 - 4x */
74 100, /* 10101 - 10x */
75 50, /* 10110 - 5x */
76 120, /* 10111 - 12x */
77 80, /* 11000 - 8x */
78 140, /* 11001 - 14x */
79 60, /* 11010 - 6x */
80 160, /* 11011 - 16x */
81 135, /* 11100 - 13.5x */
82 280, /* 11101 - 28x */
83 0, /* 11110 - off */
84 125 /* 11111 - 12.5x */
roy zang4c527832006-11-02 18:49:51 +080085};
86
wdenk72755c72003-06-20 23:10:58 +000087static const int hid1_fx_multipliers_x_10[] = {
wdenk3a473b22004-01-03 00:43:19 +000088 00, /* 0000 - off */
89 00, /* 0001 - off */
90 10, /* 0010 - bypass */
91 10, /* 0011 - bypass */
92 20, /* 0100 - 2x */
93 25, /* 0101 - 2.5x */
94 30, /* 0110 - 3x */
95 35, /* 0111 - 3.5x */
96 40, /* 1000 - 4x */
97 45, /* 1001 - 4.5x */
98 50, /* 1010 - 5x */
99 55, /* 1011 - 5.5x */
100 60, /* 1100 - 6x */
101 65, /* 1101 - 6.5x */
102 70, /* 1110 - 7x */
103 75, /* 1111 - 7.5 */
104 80, /* 10000 - 8x */
105 85, /* 10001 - 8.5x */
106 90, /* 10010 - 9x */
107 95, /* 10011 - 9.5x */
108 100, /* 10100 - 10x */
109 110, /* 10101 - 11x */
110 120, /* 10110 - 12x */
wdenk72755c72003-06-20 23:10:58 +0000111};
112
113
wdenk4a9cbbe2002-08-27 09:48:53 +0000114/* ------------------------------------------------------------------------- */
115
116/*
117 * Measure CPU clock speed (core clock GCLK1, GCLK2)
118 *
119 * (Approx. GCLK frequency in Hz)
120 */
121
122int get_clocks (void)
123{
wdenk3a473b22004-01-03 00:43:19 +0000124 ulong clock = 0;
125
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#ifdef CONFIG_SYS_BUS_CLK
127 gd->bus_clk = CONFIG_SYS_BUS_CLK; /* bus clock is a fixed frequency */
roy zang4dbcd692006-12-04 17:54:21 +0800128#else
129 gd->bus_clk = get_board_bus_clk (); /* bus clock is configurable */
roy zang4c527832006-11-02 18:49:51 +0800130#endif
131
wdenk3a473b22004-01-03 00:43:19 +0000132 /* calculate the clock frequency based upon the CPU type */
133 switch (get_cpu_type()) {
roy zang4c527832006-11-02 18:49:51 +0800134 case CPU_7447A:
135 case CPU_7448:
wdenk3a473b22004-01-03 00:43:19 +0000136 case CPU_7455:
137 case CPU_7457:
138 /*
wdenk3a473b22004-01-03 00:43:19 +0000139 * Make sure division is done before multiplication to prevent 32-bit
140 * arithmetic overflows which will cause a negative number
141 */
roy zangee311212006-12-01 11:47:36 +0800142 clock = (gd->bus_clk / 10) *
roy zang4dbcd692006-12-04 17:54:21 +0800143 hid1_74xx_multipliers_x_10[(get_hid1 () >> 12) & 0x1F];
wdenk3a473b22004-01-03 00:43:19 +0000144 break;
145
146 case CPU_750GX:
147 case CPU_750FX:
Stefan Roesec21f62d2009-05-14 07:25:13 +0200148 clock = (gd->bus_clk / 10) *
149 hid1_fx_multipliers_x_10[get_hid1 () >> 27];
wdenk3a473b22004-01-03 00:43:19 +0000150 break;
151
152 case CPU_7450:
153 case CPU_740:
154 case CPU_740P:
155 case CPU_745:
156 case CPU_750CX:
157 case CPU_750:
158 case CPU_750P:
159 case CPU_755:
160 case CPU_7400:
161 case CPU_7410:
162 /*
163 * Make sure division is done before multiplication to prevent 32-bit
164 * arithmetic overflows which will cause a negative number
165 */
roy zangee311212006-12-01 11:47:36 +0800166 clock = (gd->bus_clk / 10) *
167 hid1_multipliers_x_10[get_hid1 () >> 28];
wdenk3a473b22004-01-03 00:43:19 +0000168 break;
169
170 case CPU_UNKNOWN:
171 printf ("get_gclk_freq(): unknown CPU type\n");
172 clock = 0;
173 return (1);
174 }
175
wdenk4a9cbbe2002-08-27 09:48:53 +0000176 gd->cpu_clk = clock;
wdenk4a9cbbe2002-08-27 09:48:53 +0000177
178 return (0);
179}
180
181/* ------------------------------------------------------------------------- */