blob: c7edcc09097b00e32c709e3328a2cccb93c31e26 [file] [log] [blame]
Andy Fleming5f184712011-04-08 02:10:27 -05001/*
2 * Generic PHY Management code
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 *
19 *
20 * Copyright 2011 Freescale Semiconductor, Inc.
21 * author Andy Fleming
22 *
23 * Based loosely off of Linux's PHY Lib
24 */
25
26#include <config.h>
27#include <common.h>
28#include <malloc.h>
29#include <net.h>
30#include <command.h>
31#include <miiphy.h>
32#include <phy.h>
33#include <errno.h>
34
35/* Generic PHY support and helper functions */
36
37/**
38 * genphy_config_advert - sanitize and advertise auto-negotation parameters
39 * @phydev: target phy_device struct
40 *
41 * Description: Writes MII_ADVERTISE with the appropriate values,
42 * after sanitizing the values to make sure we only advertise
43 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
44 * hasn't changed, and > 0 if it has changed.
45 */
46int genphy_config_advert(struct phy_device *phydev)
47{
48 u32 advertise;
49 int oldadv, adv;
50 int err, changed = 0;
51
52 /* Only allow advertising what
53 * this PHY supports */
54 phydev->advertising &= phydev->supported;
55 advertise = phydev->advertising;
56
57 /* Setup standard advertisement */
58 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
59
60 if (adv < 0)
61 return adv;
62
63 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
64 ADVERTISE_PAUSE_ASYM);
65 if (advertise & ADVERTISED_10baseT_Half)
66 adv |= ADVERTISE_10HALF;
67 if (advertise & ADVERTISED_10baseT_Full)
68 adv |= ADVERTISE_10FULL;
69 if (advertise & ADVERTISED_100baseT_Half)
70 adv |= ADVERTISE_100HALF;
71 if (advertise & ADVERTISED_100baseT_Full)
72 adv |= ADVERTISE_100FULL;
73 if (advertise & ADVERTISED_Pause)
74 adv |= ADVERTISE_PAUSE_CAP;
75 if (advertise & ADVERTISED_Asym_Pause)
76 adv |= ADVERTISE_PAUSE_ASYM;
77
78 if (adv != oldadv) {
79 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
80
81 if (err < 0)
82 return err;
83 changed = 1;
84 }
85
86 /* Configure gigabit if it's supported */
87 if (phydev->supported & (SUPPORTED_1000baseT_Half |
88 SUPPORTED_1000baseT_Full)) {
89 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
90
91 if (adv < 0)
92 return adv;
93
94 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
95 if (advertise & SUPPORTED_1000baseT_Half)
96 adv |= ADVERTISE_1000HALF;
97 if (advertise & SUPPORTED_1000baseT_Full)
98 adv |= ADVERTISE_1000FULL;
99
100 if (adv != oldadv) {
101 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
102 adv);
103
104 if (err < 0)
105 return err;
106 changed = 1;
107 }
108 }
109
110 return changed;
111}
112
113
114/**
115 * genphy_setup_forced - configures/forces speed/duplex from @phydev
116 * @phydev: target phy_device struct
117 *
118 * Description: Configures MII_BMCR to force speed/duplex
119 * to the values in phydev. Assumes that the values are valid.
120 */
121int genphy_setup_forced(struct phy_device *phydev)
122{
123 int err;
124 int ctl = 0;
125
126 phydev->pause = phydev->asym_pause = 0;
127
128 if (SPEED_1000 == phydev->speed)
129 ctl |= BMCR_SPEED1000;
130 else if (SPEED_100 == phydev->speed)
131 ctl |= BMCR_SPEED100;
132
133 if (DUPLEX_FULL == phydev->duplex)
134 ctl |= BMCR_FULLDPLX;
135
136 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
137
138 return err;
139}
140
141
142/**
143 * genphy_restart_aneg - Enable and Restart Autonegotiation
144 * @phydev: target phy_device struct
145 */
146int genphy_restart_aneg(struct phy_device *phydev)
147{
148 int ctl;
149
150 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
151
152 if (ctl < 0)
153 return ctl;
154
155 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
156
157 /* Don't isolate the PHY if we're negotiating */
158 ctl &= ~(BMCR_ISOLATE);
159
160 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
161
162 return ctl;
163}
164
165
166/**
167 * genphy_config_aneg - restart auto-negotiation or write BMCR
168 * @phydev: target phy_device struct
169 *
170 * Description: If auto-negotiation is enabled, we configure the
171 * advertising, and then restart auto-negotiation. If it is not
172 * enabled, then we write the BMCR.
173 */
174int genphy_config_aneg(struct phy_device *phydev)
175{
176 int result;
177
178 if (AUTONEG_ENABLE != phydev->autoneg)
179 return genphy_setup_forced(phydev);
180
181 result = genphy_config_advert(phydev);
182
183 if (result < 0) /* error */
184 return result;
185
186 if (result == 0) {
187 /* Advertisment hasn't changed, but maybe aneg was never on to
188 * begin with? Or maybe phy was isolated? */
189 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
190
191 if (ctl < 0)
192 return ctl;
193
194 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
195 result = 1; /* do restart aneg */
196 }
197
198 /* Only restart aneg if we are advertising something different
199 * than we were before. */
200 if (result > 0)
201 result = genphy_restart_aneg(phydev);
202
203 return result;
204}
205
206/**
207 * genphy_update_link - update link status in @phydev
208 * @phydev: target phy_device struct
209 *
210 * Description: Update the value in phydev->link to reflect the
211 * current link value. In order to do this, we need to read
212 * the status register twice, keeping the second value.
213 */
214int genphy_update_link(struct phy_device *phydev)
215{
216 unsigned int mii_reg;
217
218 /*
219 * Wait if the link is up, and autonegotiation is in progress
220 * (ie - we're capable and it's not done)
221 */
222 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
223
224 /*
225 * If we already saw the link up, and it hasn't gone down, then
226 * we don't need to wait for autoneg again
227 */
228 if (phydev->link && mii_reg & BMSR_LSTATUS)
229 return 0;
230
231 if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
232 int i = 0;
233
234 printf("%s Waiting for PHY auto negotiation to complete",
235 phydev->dev->name);
236 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
237 /*
238 * Timeout reached ?
239 */
240 if (i > PHY_ANEG_TIMEOUT) {
241 printf(" TIMEOUT !\n");
242 phydev->link = 0;
243 return 0;
244 }
245
246 if (ctrlc()) {
247 puts("user interrupt!\n");
248 phydev->link = 0;
249 return -EINTR;
250 }
251
252 if ((i++ % 500) == 0)
253 printf(".");
254
255 udelay(1000); /* 1 ms */
256 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
257 }
258 printf(" done\n");
259 phydev->link = 1;
260 } else {
261 /* Read the link a second time to clear the latched state */
262 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
263
264 if (mii_reg & BMSR_LSTATUS)
265 phydev->link = 1;
266 else
267 phydev->link = 0;
268 }
269
270 return 0;
271}
272
273/*
274 * Generic function which updates the speed and duplex. If
275 * autonegotiation is enabled, it uses the AND of the link
276 * partner's advertised capabilities and our advertised
277 * capabilities. If autonegotiation is disabled, we use the
278 * appropriate bits in the control register.
279 *
280 * Stolen from Linux's mii.c and phy_device.c
281 */
282static int genphy_parse_link(struct phy_device *phydev)
283{
284 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
285
286 /* We're using autonegotiation */
287 if (mii_reg & BMSR_ANEGCAPABLE) {
288 u32 lpa = 0;
289 u32 gblpa = 0;
290
291 /* Check for gigabit capability */
292 if (mii_reg & BMSR_ERCAP) {
293 /* We want a list of states supported by
294 * both PHYs in the link
295 */
296 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
297 gblpa &= phy_read(phydev,
298 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
299 }
300
301 /* Set the baseline so we only have to set them
302 * if they're different
303 */
304 phydev->speed = SPEED_10;
305 phydev->duplex = DUPLEX_HALF;
306
307 /* Check the gigabit fields */
308 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
309 phydev->speed = SPEED_1000;
310
311 if (gblpa & PHY_1000BTSR_1000FD)
312 phydev->duplex = DUPLEX_FULL;
313
314 /* We're done! */
315 return 0;
316 }
317
318 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
319 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
320
321 if (lpa & (LPA_100FULL | LPA_100HALF)) {
322 phydev->speed = SPEED_100;
323
324 if (lpa & LPA_100FULL)
325 phydev->duplex = DUPLEX_FULL;
326
327 } else if (lpa & LPA_10FULL)
328 phydev->duplex = DUPLEX_FULL;
329 } else {
330 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
331
332 phydev->speed = SPEED_10;
333 phydev->duplex = DUPLEX_HALF;
334
335 if (bmcr & BMCR_FULLDPLX)
336 phydev->duplex = DUPLEX_FULL;
337
338 if (bmcr & BMCR_SPEED1000)
339 phydev->speed = SPEED_1000;
340 else if (bmcr & BMCR_SPEED100)
341 phydev->speed = SPEED_100;
342 }
343
344 return 0;
345}
346
347int genphy_config(struct phy_device *phydev)
348{
349 int val;
350 u32 features;
351
352 /* For now, I'll claim that the generic driver supports
353 * all possible port types */
354 features = (SUPPORTED_TP | SUPPORTED_MII
355 | SUPPORTED_AUI | SUPPORTED_FIBRE |
356 SUPPORTED_BNC);
357
358 /* Do we support autonegotiation? */
359 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
360
361 if (val < 0)
362 return val;
363
364 if (val & BMSR_ANEGCAPABLE)
365 features |= SUPPORTED_Autoneg;
366
367 if (val & BMSR_100FULL)
368 features |= SUPPORTED_100baseT_Full;
369 if (val & BMSR_100HALF)
370 features |= SUPPORTED_100baseT_Half;
371 if (val & BMSR_10FULL)
372 features |= SUPPORTED_10baseT_Full;
373 if (val & BMSR_10HALF)
374 features |= SUPPORTED_10baseT_Half;
375
376 if (val & BMSR_ESTATEN) {
377 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
378
379 if (val < 0)
380 return val;
381
382 if (val & ESTATUS_1000_TFULL)
383 features |= SUPPORTED_1000baseT_Full;
384 if (val & ESTATUS_1000_THALF)
385 features |= SUPPORTED_1000baseT_Half;
386 }
387
388 phydev->supported = features;
389 phydev->advertising = features;
390
391 genphy_config_aneg(phydev);
392
393 return 0;
394}
395
396int genphy_startup(struct phy_device *phydev)
397{
398 genphy_update_link(phydev);
399 genphy_parse_link(phydev);
400
401 return 0;
402}
403
404int genphy_shutdown(struct phy_device *phydev)
405{
406 return 0;
407}
408
409static struct phy_driver genphy_driver = {
410 .uid = 0xffffffff,
411 .mask = 0xffffffff,
412 .name = "Generic PHY",
413 .features = 0,
414 .config = genphy_config,
415 .startup = genphy_startup,
416 .shutdown = genphy_shutdown,
417};
418
419static LIST_HEAD(phy_drivers);
420
421int phy_init(void)
422{
Andy Fleming9082eea2011-04-07 21:56:05 -0500423#ifdef CONFIG_PHY_ATHEROS
424 phy_atheros_init();
425#endif
426#ifdef CONFIG_PHY_BROADCOM
427 phy_broadcom_init();
428#endif
429#ifdef CONFIG_PHY_DAVICOM
430 phy_davicom_init();
431#endif
432#ifdef CONFIG_PHY_LXT
433 phy_lxt_init();
434#endif
435#ifdef CONFIG_PHY_MARVELL
436 phy_marvell_init();
437#endif
438#ifdef CONFIG_PHY_MICREL
439 phy_micrel_init();
440#endif
441#ifdef CONFIG_PHY_NATSEMI
442 phy_natsemi_init();
443#endif
444#ifdef CONFIG_PHY_REALTEK
445 phy_realtek_init();
446#endif
447#ifdef CONFIG_PHY_TERANETICS
448 phy_teranetics_init();
449#endif
450#ifdef CONFIG_PHY_VITESSE
451 phy_vitesse_init();
452#endif
453
Andy Fleming5f184712011-04-08 02:10:27 -0500454 return 0;
455}
456
457int phy_register(struct phy_driver *drv)
458{
459 INIT_LIST_HEAD(&drv->list);
460 list_add_tail(&drv->list, &phy_drivers);
461
462 return 0;
463}
464
465int phy_probe(struct phy_device *phydev)
466{
467 int err = 0;
468
469 phydev->advertising = phydev->supported = phydev->drv->features;
470 phydev->mmds = phydev->drv->mmds;
471
472 if (phydev->drv->probe)
473 err = phydev->drv->probe(phydev);
474
475 return err;
476}
477
478static struct phy_driver *generic_for_interface(phy_interface_t interface)
479{
480#ifdef CONFIG_PHYLIB_10G
481 if (is_10g_interface(interface))
482 return &gen10g_driver;
483#endif
484
485 return &genphy_driver;
486}
487
488struct phy_driver *get_phy_driver(struct phy_device *phydev,
489 phy_interface_t interface)
490{
491 struct list_head *entry;
492 int phy_id = phydev->phy_id;
493 struct phy_driver *drv = NULL;
494
495 list_for_each(entry, &phy_drivers) {
496 drv = list_entry(entry, struct phy_driver, list);
497 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
498 return drv;
499 }
500
501 /* If we made it here, there's no driver for this PHY */
502 return generic_for_interface(interface);
503}
504
505struct phy_device *phy_device_create(struct mii_dev *bus, int addr, int phy_id,
506 phy_interface_t interface)
507{
508 struct phy_device *dev;
509
510 /* We allocate the device, and initialize the
511 * default values */
512 dev = malloc(sizeof(*dev));
513 if (!dev) {
514 printf("Failed to allocate PHY device for %s:%d\n",
515 bus->name, addr);
516 return NULL;
517 }
518
519 memset(dev, 0, sizeof(*dev));
520
521 dev->duplex = -1;
522 dev->link = 1;
523 dev->interface = interface;
524
525 dev->autoneg = AUTONEG_ENABLE;
526
527 dev->addr = addr;
528 dev->phy_id = phy_id;
529 dev->bus = bus;
530
531 dev->drv = get_phy_driver(dev, interface);
532
533 phy_probe(dev);
534
535 bus->phymap[addr] = dev;
536
537 return dev;
538}
539
540/**
541 * get_phy_id - reads the specified addr for its ID.
542 * @bus: the target MII bus
543 * @addr: PHY address on the MII bus
544 * @phy_id: where to store the ID retrieved.
545 *
546 * Description: Reads the ID registers of the PHY at @addr on the
547 * @bus, stores it in @phy_id and returns zero on success.
548 */
549int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
550{
551 int phy_reg;
552
553 /* Grab the bits from PHYIR1, and put them
554 * in the upper half */
555 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
556
557 if (phy_reg < 0)
558 return -EIO;
559
560 *phy_id = (phy_reg & 0xffff) << 16;
561
562 /* Grab the bits from PHYIR2, and put them in the lower half */
563 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
564
565 if (phy_reg < 0)
566 return -EIO;
567
568 *phy_id |= (phy_reg & 0xffff);
569
570 return 0;
571}
572
573/**
574 * get_phy_device - reads the specified PHY device and returns its @phy_device struct
575 * @bus: the target MII bus
576 * @addr: PHY address on the MII bus
577 *
578 * Description: Reads the ID registers of the PHY at @addr on the
579 * @bus, then allocates and returns the phy_device to represent it.
580 */
581struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
582 phy_interface_t interface)
583{
584 u32 phy_id = 0x1fffffff;
585 int i;
586 int r;
587
588 /* If we have one, return the existing device, with new interface */
589 if (bus->phymap[addr]) {
590 bus->phymap[addr]->interface = interface;
591
592 return bus->phymap[addr];
593 }
594
595 /* Try Standard (ie Clause 22) access */
596 r = get_phy_id(bus, addr, MDIO_DEVAD_NONE, &phy_id);
597 if (r)
598 return NULL;
599
600 /* If the PHY ID is mostly f's, we didn't find anything */
601 if ((phy_id & 0x1fffffff) != 0x1fffffff)
602 return phy_device_create(bus, addr, phy_id, interface);
603
604 /* Otherwise we have to try Clause 45 */
605 for (i = 1; i < 5; i++) {
606 r = get_phy_id(bus, addr, i, &phy_id);
607 if (r)
608 return NULL;
609
610 /* If the phy_id is mostly Fs, there is no device there */
611 if ((phy_id & 0x1fffffff) != 0x1fffffff)
612 break;
613 }
614
615 return phy_device_create(bus, addr, phy_id, interface);
616}
617
618int phy_reset(struct phy_device *phydev)
619{
620 int reg;
621 int timeout = 500;
622 int devad = MDIO_DEVAD_NONE;
623
624#ifdef CONFIG_PHYLIB_10G
625 /* If it's 10G, we need to issue reset through one of the MMDs */
626 if (is_10g_interface(phydev->interface)) {
627 if (!phydev->mmds)
628 gen10g_discover_mmds(phydev);
629
630 devad = ffs(phydev->mmds) - 1;
631 }
632#endif
633
634 reg = phy_read(phydev, devad, MII_BMCR);
635 if (reg < 0) {
636 debug("PHY status read failed\n");
637 return -1;
638 }
639
640 reg |= BMCR_RESET;
641
642 if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
643 debug("PHY reset failed\n");
644 return -1;
645 }
646
647#ifdef CONFIG_PHY_RESET_DELAY
648 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
649#endif
650 /*
651 * Poll the control register for the reset bit to go to 0 (it is
652 * auto-clearing). This should happen within 0.5 seconds per the
653 * IEEE spec.
654 */
655 while ((reg & BMCR_RESET) && timeout--) {
656 reg = phy_read(phydev, devad, MII_BMCR);
657
658 if (reg < 0) {
659 debug("PHY status read failed\n");
660 return -1;
661 }
662 udelay(1000);
663 }
664
665 if (reg & BMCR_RESET) {
666 puts("PHY reset timed out\n");
667 return -1;
668 }
669
670 return 0;
671}
672
673int miiphy_reset(const char *devname, unsigned char addr)
674{
675 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
676 struct phy_device *phydev;
677
678 /*
679 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
680 * If later code tries to connect with the right interface, this will
681 * be corrected by get_phy_device in phy_connect()
682 */
683 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
684
685 return phy_reset(phydev);
686}
687
688struct phy_device *phy_connect(struct mii_dev *bus, int addr,
689 struct eth_device *dev,
690 phy_interface_t interface)
691{
692 struct phy_device *phydev;
693
694 /* Reset the bus */
695 bus->reset(bus);
696
697 /* Wait 15ms to make sure the PHY has come out of hard reset */
698 udelay(15000);
699
700 phydev = get_phy_device(bus, addr, interface);
701
702 if (!phydev) {
703 printf("Could not get PHY for %s:%d\n", bus->name, addr);
704
705 return NULL;
706 }
707
708 /* Soft Reset the PHY */
709 phy_reset(phydev);
710
711 if (phydev->dev)
712 printf("%s:%d is connected to %s. Reconnecting to %s\n",
713 bus->name, addr, phydev->dev->name, dev->name);
714
715 phydev->dev = dev;
716
717 printf("%s connected to %s\n", dev->name, phydev->drv->name);
718
719 return phydev;
720}
721
722int phy_startup(struct phy_device *phydev)
723{
724 if (phydev->drv->startup)
725 phydev->drv->startup(phydev);
726
727 return 0;
728}
729
730static int __board_phy_config(struct phy_device *phydev)
731{
732 return 0;
733}
734
735int board_phy_config(struct phy_device *phydev)
736 __attribute__((weak, alias("__board_phy_config")));
737
738int phy_config(struct phy_device *phydev)
739{
740 if (phydev->drv->config)
741 phydev->drv->config(phydev);
742
743 /* Invoke an optional board-specific helper */
744 board_phy_config(phydev);
745
746 return 0;
747}
748
749int phy_shutdown(struct phy_device *phydev)
750{
751 if (phydev->drv->shutdown)
752 phydev->drv->shutdown(phydev);
753
754 return 0;
755}