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Scott Wood96b8a052007-04-16 14:54:15 -05001/*
2 * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
3 *
4 * Author: Scott Wood <scottwood@freescale.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Scott Wood96b8a052007-04-16 14:54:15 -05007 */
8
9#include <common.h>
Kim Phillipsb3458d22007-12-20 15:57:28 -060010#if defined(CONFIG_OF_LIBFDT)
Kim Phillips3fde9e82007-08-15 22:30:33 -050011#include <libfdt.h>
12#endif
Scott Wood96b8a052007-04-16 14:54:15 -050013#include <pci.h>
14#include <mpc83xx.h>
Timur Tabi89c77842008-02-08 13:15:55 -060015#include <vsc7385.h>
Scott Woode4c09502008-06-30 14:13:28 -050016#include <ns16550.h>
17#include <nand.h>
Scott Wood22f44422012-12-06 13:33:18 +000018#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
Joe Hershberger0eaf8f92011-11-11 15:55:38 -060019#include <asm/gpio.h>
20#endif
Scott Wood96b8a052007-04-16 14:54:15 -050021
22DECLARE_GLOBAL_DATA_PTR;
23
24int board_early_init_f(void)
25{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020026#ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC
27 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
Scott Wood96b8a052007-04-16 14:54:15 -050028
29 if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
30 gd->flags |= GD_FLG_SILENT;
31#endif
Scott Wood22f44422012-12-06 13:33:18 +000032#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
Joe Hershberger0eaf8f92011-11-11 15:55:38 -060033 mpc83xx_gpio_init_f();
34#endif
35
36 return 0;
37}
38
39int board_early_init_r(void)
40{
Scott Wood22f44422012-12-06 13:33:18 +000041#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
Joe Hershberger0eaf8f92011-11-11 15:55:38 -060042 mpc83xx_gpio_init_r();
43#endif
Scott Wood96b8a052007-04-16 14:54:15 -050044
45 return 0;
46}
47
48int checkboard(void)
49{
50 puts("Board: Freescale MPC8313ERDB\n");
51 return 0;
52}
53
Scott Wood22f44422012-12-06 13:33:18 +000054#ifndef CONFIG_SPL_BUILD
Scott Wood96b8a052007-04-16 14:54:15 -050055static struct pci_region pci_regions[] = {
56 {
Kim Phillipsa2873bd2012-10-29 13:34:39 +000057 .bus_start = CONFIG_SYS_PCI1_MEM_BASE,
58 .phys_start = CONFIG_SYS_PCI1_MEM_PHYS,
59 .size = CONFIG_SYS_PCI1_MEM_SIZE,
60 .flags = PCI_REGION_MEM | PCI_REGION_PREFETCH
Scott Wood96b8a052007-04-16 14:54:15 -050061 },
62 {
Kim Phillipsa2873bd2012-10-29 13:34:39 +000063 .bus_start = CONFIG_SYS_PCI1_MMIO_BASE,
64 .phys_start = CONFIG_SYS_PCI1_MMIO_PHYS,
65 .size = CONFIG_SYS_PCI1_MMIO_SIZE,
66 .flags = PCI_REGION_MEM
Scott Wood96b8a052007-04-16 14:54:15 -050067 },
68 {
Kim Phillipsa2873bd2012-10-29 13:34:39 +000069 .bus_start = CONFIG_SYS_PCI1_IO_BASE,
70 .phys_start = CONFIG_SYS_PCI1_IO_PHYS,
71 .size = CONFIG_SYS_PCI1_IO_SIZE,
72 .flags = PCI_REGION_IO
Scott Wood96b8a052007-04-16 14:54:15 -050073 }
74};
75
76void pci_init_board(void)
77{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
Scott Wood96b8a052007-04-16 14:54:15 -050079 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
80 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
81 struct pci_region *reg[] = { pci_regions };
Scott Wood96b8a052007-04-16 14:54:15 -050082
83 /* Enable all 3 PCI_CLK_OUTPUTs. */
84 clk->occr |= 0xe0000000;
85
86 /*
87 * Configure PCI Local Access Windows
88 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020089 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
Scott Wood96b8a052007-04-16 14:54:15 -050090 pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
91
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020092 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
Scott Wood96b8a052007-04-16 14:54:15 -050093 pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
94
Peter Tyser6aa3d3b2010-09-14 19:13:50 -050095 mpc83xx_pci_init(1, reg);
Scott Wood96b8a052007-04-16 14:54:15 -050096}
97
Timur Tabi89c77842008-02-08 13:15:55 -060098/*
99 * Miscellaneous late-boot configurations
100 *
101 * If a VSC7385 microcode image is present, then upload it.
102*/
103int misc_init_r(void)
104{
105 int rc = 0;
106
107#ifdef CONFIG_VSC7385_IMAGE
108 if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
109 CONFIG_VSC7385_IMAGE_SIZE)) {
110 puts("Failure uploading VSC7385 microcode.\n");
111 rc = 1;
112 }
113#endif
114
115 return rc;
116}
117
Kim Phillips3fde9e82007-08-15 22:30:33 -0500118#if defined(CONFIG_OF_BOARD_SETUP)
Simon Glasse895a4b2014-10-23 18:58:47 -0600119int ft_board_setup(void *blob, bd_t *bd)
Scott Wood96b8a052007-04-16 14:54:15 -0500120{
Kim Phillips3fde9e82007-08-15 22:30:33 -0500121 ft_cpu_setup(blob, bd);
122#ifdef CONFIG_PCI
123 ft_pci_setup(blob, bd);
124#endif
Simon Glasse895a4b2014-10-23 18:58:47 -0600125
126 return 0;
Scott Wood96b8a052007-04-16 14:54:15 -0500127}
128#endif
Scott Wood22f44422012-12-06 13:33:18 +0000129#else /* CONFIG_SPL_BUILD */
Scott Woode4c09502008-06-30 14:13:28 -0500130void board_init_f(ulong bootflag)
131{
132 board_early_init_f();
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133 NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
Wolfgang Denk93e14592013-10-04 17:43:24 +0200134 CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
Scott Woode4c09502008-06-30 14:13:28 -0500135 puts("NAND boot... ");
136 init_timebase();
137 initdram(0);
Mingkai Hu6e1385d2009-09-11 10:53:08 +0800138 relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd,
Wolfgang Denk93e14592013-10-04 17:43:24 +0200139 CONFIG_SYS_NAND_U_BOOT_RELOC);
Scott Woode4c09502008-06-30 14:13:28 -0500140}
141
142void board_init_r(gd_t *gd, ulong dest_addr)
143{
144 nand_boot();
145}
146
147void putc(char c)
148{
149 if (gd->flags & GD_FLG_SILENT)
150 return;
151
152 if (c == '\n')
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r');
Scott Woode4c09502008-06-30 14:13:28 -0500154
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c);
Scott Woode4c09502008-06-30 14:13:28 -0500156}
157#endif