Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 1 | /* |
2 | * Copyright (c) 2004-2008 Texas Instruments | ||||
3 | * | ||||
4 | * (C) Copyright 2002 | ||||
5 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> | ||||
6 | * | ||||
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 8 | */ |
9 | |||||
10 | OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") | ||||
11 | OUTPUT_ARCH(arm) | ||||
12 | ENTRY(_start) | ||||
13 | SECTIONS | ||||
14 | { | ||||
15 | . = 0x00000000; | ||||
16 | |||||
17 | . = ALIGN(4); | ||||
18 | .text : | ||||
19 | { | ||||
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 20 | *(.__image_copy_start) |
Stephen Warren | b68d671 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 21 | CPUDIR/start.o (.text*) |
22 | *(.text*) | ||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 23 | } |
24 | |||||
25 | . = ALIGN(4); | ||||
26 | .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } | ||||
27 | |||||
28 | . = ALIGN(4); | ||||
29 | .data : { | ||||
Stephen Warren | b68d671 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 30 | *(.data*) |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 31 | } |
32 | |||||
33 | . = ALIGN(4); | ||||
34 | |||||
35 | . = .; | ||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 36 | |
37 | . = ALIGN(4); | ||||
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 38 | .u_boot_list : { |
Albert ARIBAUD | ef123c5 | 2013-02-25 00:59:00 +0000 | [diff] [blame] | 39 | KEEP(*(SORT(.u_boot_list*))); |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 40 | } |
41 | |||||
42 | . = ALIGN(4); | ||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 43 | |
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 44 | .image_copy_end : |
45 | { | ||||
46 | *(.__image_copy_end) | ||||
47 | } | ||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 48 | |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 49 | .rel_dyn_start : |
50 | { | ||||
51 | *(.__rel_dyn_start) | ||||
52 | } | ||||
53 | |||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 54 | .rel.dyn : { |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 55 | *(.rel*) |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 56 | } |
57 | |||||
58 | .rel_dyn_end : | ||||
59 | { | ||||
60 | *(.__rel_dyn_end) | ||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 61 | } |
62 | |||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 63 | _end = .; |
64 | |||||
65 | /* | ||||
66 | * Deprecated: this MMU section is used by pxa at present but | ||||
67 | * should not be used by new boards/CPUs. | ||||
68 | */ | ||||
69 | . = ALIGN(4096); | ||||
70 | .mmutable : { | ||||
71 | *(.mmutable) | ||||
72 | } | ||||
73 | |||||
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 74 | /* |
75 | * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c | ||||
76 | * __bss_base and __bss_limit are for linker only (overlay ordering) | ||||
77 | */ | ||||
78 | |||||
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 79 | .bss_start __rel_dyn_start (OVERLAY) : { |
80 | KEEP(*(.__bss_start)); | ||||
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 81 | __bss_base = .; |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 82 | } |
83 | |||||
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 84 | .bss __bss_base (OVERLAY) : { |
Stephen Warren | b68d671 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 85 | *(.bss*) |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 86 | . = ALIGN(4); |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 87 | __bss_limit = .; |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 88 | } |
Tom Rini | 0ce033d | 2013-03-18 12:31:00 -0400 | [diff] [blame] | 89 | |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 90 | .bss_end __bss_limit (OVERLAY) : { |
91 | KEEP(*(.__bss_end)); | ||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 92 | } |
93 | |||||
Albert ARIBAUD | 09d8118 | 2013-06-11 14:17:31 +0200 | [diff] [blame] | 94 | /DISCARD/ : { *(.dynsym) } |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 95 | /DISCARD/ : { *(.dynstr*) } |
96 | /DISCARD/ : { *(.dynamic*) } | ||||
97 | /DISCARD/ : { *(.plt*) } | ||||
98 | /DISCARD/ : { *(.interp*) } | ||||
99 | /DISCARD/ : { *(.gnu*) } | ||||
Michal Simek | fba1ed4 | 2013-07-25 16:16:46 +0200 | [diff] [blame] | 100 | /DISCARD/ : { *(.ARM.exidx*) } |
101 | /DISCARD/ : { *(.gnu.linkonce.armexidx.*) } | ||||
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 102 | } |