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Eran Libertyf046ccd2005-07-28 10:08:46 -05001/*
2 * Copyright 2004 Freescale Semiconductor, Inc.
3 * Liberty Eran (liberty@freescale.com)
4 */
5
6#ifndef __E300_H__
7#define __E300_H__
8
Scott Wood95e7ef82007-04-16 14:34:16 -05009#define PVR_E300C1 0x80830000
10#define PVR_E300C2 0x80840000
11#define PVR_E300C3 0x80850000
Rafal Jaworowski8993e542007-07-27 14:43:59 +020012#define PVR_E300C4 0x80860000
Dave Liu24c3aca2006-12-07 21:13:15 +080013
Eran Libertyf046ccd2005-07-28 10:08:46 -050014/*
15 * Hardware Implementation-Dependent Register 0 (HID0)
16 */
Jon Loeligerde1d0a62005-08-01 13:20:47 -050017
Eran Libertyf046ccd2005-07-28 10:08:46 -050018/* #define HID0 1008 already defined in processor.h */
19#define HID0_MASK_MACHINE_CHECK 0x00000000
20#define HID0_ENABLE_MACHINE_CHECK 0x80000000
21
22#define HID0_DISABLE_CACHE_PARITY 0x00000000
23#define HID0_ENABLE_CACHE_PARITY 0x40000000
24
25#define HID0_DISABLE_ADDRESS_PARITY 0x00000000 /* on mpc8349ads must be disabled */
26#define HID0_ENABLE_ADDRESS_PARITY 0x20000000
27
28#define HID0_DISABLE_DATA_PARITY 0x00000000 /* on mpc8349ads must be disabled */
29#define HID0_ENABLE_DATE_PARITY 0x10000000
30
31#define HID0_CORE_CLK_OUT 0x00000000
32#define HID0_CORE_CLK_OUT_DIV_2 0x08000000
33
34#define HID0_ENABLE_ARTRY_OUT_PRECHARGE 0x00000000 /* on mpc8349ads must be enabled */
35#define HID0_DISABLE_ARTRY_OUT_PRECHARGE 0x01000000
36
37#define HID0_DISABLE_DOSE_MODE 0x00000000
38#define HID0_ENABLE_DOSE_MODE 0x00800000
39
40#define HID0_DISABLE_NAP_MODE 0x00000000
41#define HID0_ENABLE_NAP_MODE 0x00400000
42
43#define HID0_DISABLE_SLEEP_MODE 0x00000000
44#define HID0_ENABLE_SLEEP_MODE 0x00200000
45
46#define HID0_DISABLE_DYNAMIC_POWER_MANAGMENT 0x00000000
47#define HID0_ENABLE_DYNAMIC_POWER_MANAGMENT 0x00100000
48
49#define HID0_SOFT_RESET 0x00010000
50
51#define HID0_DISABLE_INSTRUCTION_CACHE 0x00000000
52#define HID0_ENABLE_INSTRUCTION_CACHE 0x00008000
53
54#define HID0_DISABLE_DATA_CACHE 0x00000000
55#define HID0_ENABLE_DATA_CACHE 0x00004000
56
57#define HID0_LOCK_INSTRUCTION_CACHE 0x00002000
58
59#define HID0_LOCK_DATA_CACHE 0x00001000
60
61#define HID0_INVALIDATE_INSTRUCTION_CACHE 0x00000800
62
63#define HID0_INVALIDATE_DATA_CACHE 0x00000400
64
65#define HID0_DISABLE_M_BIT 0x00000000
66#define HID0_ENABLE_M_BIT 0x00000080
67
68#define HID0_FBIOB 0x00000010
69
70#define HID0_DISABLE_ADDRESS_BROADCAST 0x00000000
71#define HID0_ENABLE_ADDRESS_BROADCAST 0x00000008
72
73#define HID0_ENABLE_NOOP_DCACHE_INSTRUCTION 0x00000000
74#define HID0_DISABLE_NOOP_DCACHE_INSTRUCTION 0x00000001
75
76/*
77 * Hardware Implementation-Dependent Register 2 (HID2)
78 */
79#define HID2 1011
80
81#define HID2_LET 0x08000000
82#define HID2_HBE 0x00040000
83#define HID2_IWLCK_000 0x00000000 /* no ways locked */
84#define HID2_IWLCK_001 0x00002000 /* way 0 locked */
85#define HID2_IWLCK_010 0x00004000 /* way 0 through way 1 locked */
86#define HID2_IWLCK_011 0x00006000 /* way 0 through way 2 locked */
87#define HID2_IWLCK_100 0x00008000 /* way 0 through way 3 locked */
88#define HID2_IWLCK_101 0x0000A000 /* way 0 through way 4 locked */
89#define HID2_IWLCK_110 0x0000C000 /* way 0 through way 5 locked */
90
91
92/* BAT (block address translation */
93#define BATU_BEPI_MSK 0xfffe0000
94#define BATU_BL_MSK 0x00001ffc
95
96#define BATU_BL_128K 0x00000000
97#define BATU_BL_256K 0x00000004
98#define BATU_BL_512K 0x0000000c
99#define BATU_BL_1M 0x0000001c
100#define BATU_BL_2M 0x0000003c
101#define BATU_BL_4M 0x0000007c
102#define BATU_BL_8M 0x000000fc
103#define BATU_BL_16M 0x000001fc
104#define BATU_BL_32M 0x000003fc
105#define BATU_BL_64M 0x000007fc
106#define BATU_BL_128M 0x00000ffc
107#define BATU_BL_256M 0x00001ffc
108
109#define BATU_VS 0x00000002
110#define BATU_VP 0x00000001
111
112#define BATL_BRPN_MSK 0xfffe0000
113#define BATL_WIMG_MSK 0x00000078
114
115#define BATL_WRITETHROUGH 0x00000040
116#define BATL_CACHEINHIBIT 0x00000020
117#define BATL_MEMCOHERENCE 0x00000010
118#define BATL_GUARDEDSTORAGE 0x00000008
119
120#define BATL_PP_MSK 0x00000003
121#define BATL_PP_00 0x00000000 /* No access */
122#define BATL_PP_01 0x00000001 /* Read-only */
123#define BATL_PP_10 0x00000002 /* Read-write */
124#define BATL_PP_11 0x00000003
125
126#endif /* __E300_H__ */