Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Renesas Solutions AP-325RXA board |
| 3 | * |
| 4 | * Copyright (C) 2008 Renesas Solutions Corp. |
| 5 | * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> |
| 6 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __AP325RXA_H |
| 11 | #define __AP325RXA_H |
| 12 | |
| 13 | #undef DEBUG |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 14 | #define CONFIG_CPU_SH7723 1 |
| 15 | #define CONFIG_AP325RXA 1 |
| 16 | |
| 17 | #define CONFIG_CMD_LOADB |
| 18 | #define CONFIG_CMD_LOADS |
| 19 | #define CONFIG_CMD_FLASH |
| 20 | #define CONFIG_CMD_MEMORY |
| 21 | #define CONFIG_CMD_NET |
| 22 | #define CONFIG_CMD_PING |
| 23 | #define CONFIG_CMD_NFS |
| 24 | #define CONFIG_CMD_SDRAM |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 25 | #define CONFIG_CMD_SAVEENV |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 26 | #define CONFIG_CMD_IDE |
| 27 | #define CONFIG_CMD_EXT2 |
| 28 | #define CONFIG_DOS_PARTITION |
| 29 | |
| 30 | #define CONFIG_BAUDRATE 38400 |
| 31 | #define CONFIG_BOOTDELAY 3 |
| 32 | #define CONFIG_BOOTARGS "console=ttySC2,38400" |
| 33 | |
| 34 | #define CONFIG_VERSION_VARIABLE |
| 35 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 36 | |
| 37 | /* SMC9118 */ |
Ben Warren | 736fead | 2009-07-20 22:01:11 -0700 | [diff] [blame] | 38 | #define CONFIG_SMC911X 1 |
| 39 | #define CONFIG_SMC911X_32_BIT 1 |
| 40 | #define CONFIG_SMC911X_BASE 0xB6080000 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 41 | |
| 42 | /* MEMORY */ |
| 43 | #define AP325RXA_SDRAM_BASE (0x88000000) |
| 44 | #define AP325RXA_FLASH_BASE_1 (0xA0000000) |
| 45 | #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) |
| 46 | |
Nobuhiro Iwamatsu | db68b70 | 2011-01-17 20:46:35 +0900 | [diff] [blame] | 47 | #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 |
| 48 | |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 49 | /* undef to save memory */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 50 | #define CONFIG_SYS_LONGHELP |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 51 | /* Monitor Command Prompt */ |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 52 | /* Buffer size for input from the Console */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | #define CONFIG_SYS_CBSIZE 256 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 54 | /* Buffer size for Console output */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 55 | #define CONFIG_SYS_PBSIZE 256 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 56 | /* max args accepted for monitor commands */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 57 | #define CONFIG_SYS_MAXARGS 16 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 58 | /* Buffer size for Boot Arguments passed to kernel */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 59 | #define CONFIG_SYS_BARGSIZE 512 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 60 | /* List of legal baudrate settings for this board */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 62 | |
| 63 | /* SCIF */ |
| 64 | #define CONFIG_SCIF_CONSOLE 1 |
| 65 | #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ |
| 66 | #define CONFIG_CONS_SCIF5 1 |
| 67 | |
| 68 | /* Suppress display of console information at boot */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 69 | #undef CONFIG_SYS_CONSOLE_INFO_QUIET |
| 70 | #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
| 71 | #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 72 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 73 | #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) |
| 74 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 75 | |
| 76 | /* Enable alternate, more extensive, memory test */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #undef CONFIG_SYS_ALT_MEMTEST |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 78 | /* Scratch address used by the alternate memory test */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 79 | #undef CONFIG_SYS_MEMTEST_SCRATCH |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 80 | |
| 81 | /* Enable temporary baudrate change while serial download */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 82 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 83 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 84 | #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 85 | /* maybe more, but if so u-boot doesn't know about it... */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 87 | /* default load address for scripts ?!? */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 88 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 89 | |
| 90 | /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 92 | /* Monitor size */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 93 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 94 | /* Size of DRAM reserved for malloc() use */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 95 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 96 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 97 | |
| 98 | /* FLASH */ |
| 99 | #define CONFIG_FLASH_CFI_DRIVER 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 100 | #define CONFIG_SYS_FLASH_CFI |
| 101 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 102 | /* print 'E' for empty sector on flinfo */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 104 | /* Physical start address of Flash memory */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 106 | /* Max number of sectors on each Flash chip */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 107 | #define CONFIG_SYS_MAX_FLASH_SECT 512 |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 108 | |
| 109 | /* |
| 110 | * IDE support |
| 111 | */ |
| 112 | #define CONFIG_IDE_RESET 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 113 | #define CONFIG_SYS_PIO_MODE 1 |
| 114 | #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ |
| 115 | #define CONFIG_SYS_IDE_MAXDEVICE 1 |
| 116 | #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 |
| 117 | #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ |
| 118 | #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ |
| 119 | #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ |
| 120 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ |
Albert Aribaud | f2a37fc | 2010-08-08 05:17:05 +0530 | [diff] [blame] | 121 | #define CONFIG_IDE_SWAP_IO |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 122 | |
| 123 | /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 125 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 126 | |
| 127 | /* Timeout for Flash erase operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 128 | #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 129 | /* Timeout for Flash write operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 131 | /* Timeout for Flash set sector lock bit operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 132 | #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 133 | /* Timeout for Flash clear lock bit operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 135 | |
| 136 | /* |
| 137 | * Use hardware flash sectors protection instead |
| 138 | * of U-Boot software protection |
| 139 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 140 | #undef CONFIG_SYS_FLASH_PROTECTION |
| 141 | #undef CONFIG_SYS_DIRECT_FLASH_TFTP |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 142 | |
| 143 | /* ENV setting */ |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 144 | #define CONFIG_ENV_IS_IN_FLASH |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 145 | #define CONFIG_ENV_OVERWRITE 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 146 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| 147 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 148 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) |
| 149 | /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ |
| 150 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 151 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 152 | |
| 153 | /* Board Clock */ |
| 154 | #define CONFIG_SYS_CLK_FREQ 33333333 |
Nobuhiro Iwamatsu | 684a501 | 2013-08-21 16:11:21 +0900 | [diff] [blame] | 155 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
| 156 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Jean-Christophe PLAGNIOL-VILLARD | be45c63 | 2009-06-04 12:06:48 +0200 | [diff] [blame] | 157 | #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ |
Nobuhiro Iwamatsu | 6f0da49 | 2008-08-22 17:39:09 +0900 | [diff] [blame] | 158 | |
| 159 | #endif /* __AP325RXA_H */ |