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wdenk0157ced2002-10-21 17:04:47 +00001/*
Wolfgang Denk91a76752010-07-24 20:22:02 +02002 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk0157ced2002-10-21 17:04:47 +00006 */
7
8#ifndef __ASM_GBL_DATA_H
9#define __ASM_GBL_DATA_H
Simon Glass5cb48582012-12-13 20:48:30 +000010
11/* Architecture-specific global data */
12struct arch_global_data {
Simon Glasse9adeca2012-12-13 20:49:05 +000013#if defined(CONFIG_FSL_ESDHC)
14 u32 sdhc_clk;
15#endif
Zhao Qiang93d33202014-09-25 13:52:25 +080016
17#if defined(CONFIG_U_QE)
18 u32 qe_clk;
19 u32 brg_clk;
20 uint mp_alloc_base;
21 uint mp_alloc_top;
22#endif /* CONFIG_U_QE */
23
Simon Glassf47e6ec2012-12-13 20:48:31 +000024#ifdef CONFIG_AT91FAMILY
25 /* "static data" needed by at91's clock.c */
26 unsigned long cpu_clk_rate_hz;
27 unsigned long main_clk_rate_hz;
28 unsigned long mck_rate_hz;
29 unsigned long plla_rate_hz;
30 unsigned long pllb_rate_hz;
31 unsigned long at91_pllb_usb_init;
32#endif
Simon Glassb3390512012-12-13 20:48:32 +000033 /* "static data" needed by most of timer.c on ARM platforms */
34 unsigned long timer_rate_hz;
Simon Glass8ff43b02012-12-13 20:48:33 +000035 unsigned long tbu;
Simon Glass66ee6922012-12-13 20:48:34 +000036 unsigned long tbl;
Simon Glass582601d2012-12-13 20:48:35 +000037 unsigned long lastinc;
Simon Glass5f707142012-12-13 20:48:36 +000038 unsigned long long timer_reset_value;
Simon Glass34fd5d22012-12-13 20:48:39 +000039#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
40 unsigned long tlb_addr;
41 unsigned long tlb_size;
Alexander Graf7985cdf2016-03-04 01:09:54 +010042#if defined(CONFIG_ARM64)
Alexander Graf5e2ec772016-03-04 01:09:47 +010043 unsigned long tlb_fillptr;
44 unsigned long tlb_emerg;
45#endif
Simon Glass34fd5d22012-12-13 20:48:39 +000046#endif
York Sune61a7532016-06-24 16:46:18 -070047#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
48#define MEM_RESERVE_SECURE_SECURED 0x1
49#define MEM_RESERVE_SECURE_MAINTAINED 0x2
50#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
51 /*
52 * Secure memory addr
53 * This variable needs maintenance if the RAM base is not zero,
54 * or if RAM splits into non-consecutive banks. It also has a
55 * flag indicating the secure memory is marked as secure by MMU.
56 * Flags used: 0x1 secured
57 * 0x2 maintained
58 */
59 phys_addr_t secure_ram;
60#endif
SRICHARAN Rfda06812013-04-24 00:41:23 +000061
Paul Kocialkowski60c7c302015-07-15 16:02:19 +020062#ifdef CONFIG_OMAP_COMMON
63 u32 omap_boot_device;
64 u32 omap_boot_mode;
65 u8 omap_ch_flags;
SRICHARAN Rfda06812013-04-24 00:41:23 +000066#endif
Prabhakar Kushwaha44937212015-11-09 16:42:07 +053067#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
York Sunb87e6f82015-01-06 13:18:49 -080068 unsigned long mem2_clk;
69#endif
Simon Glass5cb48582012-12-13 20:48:30 +000070};
71
Simon Glassbaa1e532012-12-13 20:49:14 +000072#include <asm-generic/global_data.h>
wdenk0157ced2002-10-21 17:04:47 +000073
Jeroen Hofsteec65a2ab2014-07-30 21:54:52 +020074#ifdef __clang__
75
76#define DECLARE_GLOBAL_DATA_PTR
77#define gd get_gd()
78
79static inline gd_t *get_gd(void)
80{
81 gd_t *gd_ptr;
82
83#ifdef CONFIG_ARM64
84 /*
85 * Make will already error that reserving x18 is not supported at the
86 * time of writing, clang: error: unknown argument: '-ffixed-x18'
87 */
88 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
89#else
90 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
91#endif
92
93 return gd_ptr;
94}
95
96#else
97
David Feng0ae76532013-12-14 11:47:35 +080098#ifdef CONFIG_ARM64
99#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
100#else
101#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
102#endif
Jeroen Hofsteec65a2ab2014-07-30 21:54:52 +0200103#endif
wdenk0157ced2002-10-21 17:04:47 +0000104
105#endif /* __ASM_GBL_DATA_H */