Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_H |
| 7 | #define __CONFIG_H |
| 8 | |
Alexey Brodkin | 1ace402 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 9 | #include <linux/sizes.h> |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 10 | |
| 11 | #include "tegra30-common.h" |
| 12 | |
Stephen Warren | 2364e15 | 2014-05-08 09:33:45 -0600 | [diff] [blame] | 13 | /* VDD core PMIC */ |
| 14 | #define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 |
| 15 | |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 16 | /* High-level configuration options */ |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 17 | #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" |
| 18 | |
Stephen Warren | b9b53a6 | 2014-01-23 13:17:01 -0700 | [diff] [blame] | 19 | #define BOARD_EXTRA_ENV_SETTINGS \ |
| 20 | "board_name=cardhu-a04\0" \ |
| 21 | "fdtfile=tegra30-cardhu-a04.dtb\0" |
| 22 | |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 23 | /* Board-specific serial config */ |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 24 | #define CONFIG_TEGRA_ENABLE_UARTA |
| 25 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE |
| 26 | |
Allen Martin | d2f18f2 | 2013-01-29 13:51:29 +0000 | [diff] [blame] | 27 | /* SPI */ |
Allen Martin | d2f18f2 | 2013-01-29 13:51:29 +0000 | [diff] [blame] | 28 | #define CONFIG_TEGRA_SLINK_CTRLS 6 |
Allen Martin | d2f18f2 | 2013-01-29 13:51:29 +0000 | [diff] [blame] | 29 | #define CONFIG_SPI_FLASH_SIZE (4 << 20) |
| 30 | |
Tom Warren | bb1e7cd | 2012-12-21 16:09:52 -0700 | [diff] [blame] | 31 | #include "tegra-common-post.h" |
| 32 | |
| 33 | #endif /* __CONFIG_H */ |