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rev13@wp.pled09a552015-03-01 12:44:42 +01001/*
2 * (C) Copyright 2015
Kamil Lulko66562412015-12-01 09:08:19 +01003 * Kamil Lulko, <kamil.lulko@gmail.com>
rev13@wp.pled09a552015-03-01 12:44:42 +01004 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Albert ARIBAUDbf104ff2015-10-23 18:06:39 +020011#define CONFIG_SYS_THUMB_BUILD
rev13@wp.pled09a552015-03-01 12:44:42 +010012#define CONFIG_STM32F4DISCOVERY
rev13@wp.pled09a552015-03-01 12:44:42 +010013
rev13@wp.pled09a552015-03-01 12:44:42 +010014#define CONFIG_BOARD_EARLY_INIT_F
Antonio Borneo089fddf2015-07-19 22:19:46 +080015#define CONFIG_MISC_INIT_R
rev13@wp.pled09a552015-03-01 12:44:42 +010016
17#define CONFIG_SYS_FLASH_BASE 0x08000000
18
19#define CONFIG_SYS_INIT_SP_ADDR 0x10010000
20#define CONFIG_SYS_TEXT_BASE 0x08000000
21
22#define CONFIG_SYS_ICACHE_OFF
23#define CONFIG_SYS_DCACHE_OFF
24
25/*
26 * Configuration of the external SDRAM memory
27 */
28#define CONFIG_NR_DRAM_BANKS 1
29#define CONFIG_SYS_RAM_SIZE (8 << 20)
30#define CONFIG_SYS_RAM_CS 1
31#define CONFIG_SYS_RAM_FREQ_DIV 2
32#define CONFIG_SYS_RAM_BASE 0xD0000000
33#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
34#define CONFIG_SYS_LOAD_ADDR 0xD0400000
35#define CONFIG_LOADADDR 0xD0400000
36
37#define CONFIG_SYS_MAX_FLASH_SECT 12
38#define CONFIG_SYS_MAX_FLASH_BANKS 2
39
40#define CONFIG_ENV_IS_IN_FLASH
41#define CONFIG_ENV_OFFSET (256 << 10)
42#define CONFIG_ENV_SECT_SIZE (128 << 10)
43#define CONFIG_ENV_SIZE (8 << 10)
44
45#define CONFIG_BOARD_SPECIFIC_LED
46#define CONFIG_RED_LED 110
47#define CONFIG_GREEN_LED 109
48
49#define CONFIG_STM32_GPIO
Vikas Manocha9ecb0c42016-03-09 15:18:13 -080050#define CONFIG_STM32_FLASH
rev13@wp.pled09a552015-03-01 12:44:42 +010051#define CONFIG_STM32_SERIAL
rev13@wp.pled09a552015-03-01 12:44:42 +010052
53#define CONFIG_STM32_HSE_HZ 8000000
54
Antonio Borneof9fa4a22015-07-19 22:19:48 +080055#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */
56
rev13@wp.pled09a552015-03-01 12:44:42 +010057#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
58
59#define CONFIG_CMDLINE_TAG
60#define CONFIG_SETUP_MEMORY_TAGS
61#define CONFIG_INITRD_TAG
62#define CONFIG_REVISION_TAG
63
64#define CONFIG_SYS_CBSIZE 1024
65#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
66 + sizeof(CONFIG_SYS_PROMPT) + 16)
67
68#define CONFIG_SYS_MAXARGS 16
69
70#define CONFIG_SYS_MALLOC_LEN (2 << 20)
71
72#define CONFIG_STACKSIZE (64 << 10)
73
74#define CONFIG_BAUDRATE 115200
75#define CONFIG_BOOTARGS \
rev13@wp.pl6b330562015-07-05 12:54:23 +020076 "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
rev13@wp.pled09a552015-03-01 12:44:42 +010077#define CONFIG_BOOTCOMMAND \
78 "run bootcmd_romfs"
79
80#define CONFIG_EXTRA_ENV_SETTINGS \
81 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
82 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
83 "bootm 0x08044000 - 0x08042000\0"
84
85#define CONFIG_BOOTDELAY 3
86#define CONFIG_AUTOBOOT
87
88/*
89 * Command line configuration.
90 */
rev13@wp.pled09a552015-03-01 12:44:42 +010091#define CONFIG_SYS_LONGHELP
rev13@wp.pled09a552015-03-01 12:44:42 +010092#define CONFIG_AUTO_COMPLETE
93#define CONFIG_CMDLINE_EDITING
94
rev13@wp.pled09a552015-03-01 12:44:42 +010095#define CONFIG_CMD_MEM
rev13@wp.pled09a552015-03-01 12:44:42 +010096
97#endif /* __CONFIG_H */