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Daniel Hellstromab68f922008-03-28 10:20:43 +01001/* Configuration header file for LEON2 GRSIM.
2 *
3 * (C) Copyright 2003-2005
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Francois Retiefc8379012015-11-21 13:25:41 +02006 * (C) Copyright 2007, 2015
7 * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
Daniel Hellstromab68f922008-03-28 10:20:43 +01008 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstromab68f922008-03-28 10:20:43 +010010 */
11
12#ifndef __CONFIG_H__
13#define __CONFIG_H__
14
Francois Retiefc8379012015-11-21 13:25:41 +020015#define CONFIG_SYS_GENERIC_BOARD
Francois Retief4c547752015-10-28 16:49:02 +020016#define CONFIG_DISPLAY_BOARDINFO
Francois Retiefc8379012015-11-21 13:25:41 +020017
Daniel Hellstromab68f922008-03-28 10:20:43 +010018/*
19 * High Level Configuration Options
20 * (easy to change)
21 *
22 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
23 *
24 * TSIM command
25 * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
26 *
27 */
28
Daniel Hellstromab68f922008-03-28 10:20:43 +010029#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
30#define CONFIG_TSIM 1 /* ... running on TSIM */
31
32/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020033#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstromab68f922008-03-28 10:20:43 +010034
Daniel Hellstromab68f922008-03-28 10:20:43 +010035/*
36 * Serial console configuration
37 */
38#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstromab68f922008-03-28 10:20:43 +010040
41/* Partitions */
42#define CONFIG_DOS_PARTITION
43#define CONFIG_MAC_PARTITION
44#define CONFIG_ISO_PARTITION
45
46/*
47 * Supported commands
48 */
Daniel Hellstromab68f922008-03-28 10:20:43 +010049#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053050#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstromab68f922008-03-28 10:20:43 +010051#define CONFIG_CMD_IRQ
Daniel Hellstromab68f922008-03-28 10:20:43 +010052#define CONFIG_CMD_REGINFO
Daniel Hellstromab68f922008-03-28 10:20:43 +010053
54/*
55 * Autobooting
56 */
57#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
58
59#define CONFIG_PREBOOT "echo;" \
60 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
61 "echo"
62
63#undef CONFIG_BOOTARGS
Daniel Hellstromab68f922008-03-28 10:20:43 +010064
65#define CONFIG_EXTRA_ENV_SETTINGS \
66 "netdev=eth0\0" \
67 "nfsargs=setenv bootargs root=/dev/nfs rw " \
68 "nfsroot=${serverip}:${rootpath}\0" \
69 "ramargs=setenv bootargs root=/dev/ram rw\0" \
70 "addip=setenv bootargs ${bootargs} " \
71 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
72 ":${hostname}:${netdev}:off panic=1\0" \
73 "flash_nfs=run nfsargs addip;" \
74 "bootm ${kernel_addr}\0" \
75 "flash_self=run ramargs addip;" \
76 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
77 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
78 "rootpath=/export/roofs\0" \
79 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000080 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstromab68f922008-03-28 10:20:43 +010081 "bootargs=console=ttyS0,38400" \
82 ""
83#define CONFIG_NETMASK 255.255.255.0
84#define CONFIG_GATEWAYIP 192.168.0.1
85#define CONFIG_SERVERIP 192.168.0.81
86#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +000087#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstromab68f922008-03-28 10:20:43 +010088#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000089#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstromab68f922008-03-28 10:20:43 +010090
91#define CONFIG_BOOTCOMMAND "run flash_self"
92
93/* Memory MAP
94 *
95 * Flash:
96 * |--------------------------------|
97 * | 0x00000000 Text & Data & BSS | *
98 * | for Monitor | *
99 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
100 * | UNUSED / Growth | * 256kb
101 * |--------------------------------|
102 * | 0x00050000 Base custom area | *
103 * | kernel / FS | *
104 * | | * Rest of Flash
105 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
106 * | END-0x00008000 Environment | * 32kb
107 * |--------------------------------|
108 *
109 *
110 *
111 * Main Memory:
112 * |--------------------------------|
113 * | UNUSED / scratch area |
114 * | |
115 * | |
116 * | |
117 * | |
118 * |--------------------------------|
119 * | Monitor .Text / .DATA / .BSS | * 256kb
120 * | Relocated! | *
121 * |--------------------------------|
122 * | Monitor Malloc | * 128kb (contains relocated environment)
123 * |--------------------------------|
124 * | Monitor/kernel STACK | * 64kb
125 * |--------------------------------|
126 * | Page Table for MMU systems | * 2k
127 * |--------------------------------|
128 * | PROM Code accessed from Linux | * 6kb-128b
129 * |--------------------------------|
130 * | Global data (avail from kernel)| * 128b
131 * |--------------------------------|
132 *
133 */
134
135/*
136 * Flash configuration (8,16 or 32 MB)
137 * TEXT base always at 0xFFF00000
138 * ENV_ADDR always at 0xFFF40000
139 * FLASH_BASE at 0xFC000000 for 64 MB
140 * 0xFE000000 for 32 MB
141 * 0xFF000000 for 16 MB
142 * 0xFF800000 for 8 MB
143 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#define CONFIG_SYS_NO_FLASH 1
145#define CONFIG_SYS_FLASH_BASE 0x00000000
146#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200147#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100148
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100150
151#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
153#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100154
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
156#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
157#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
158#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100159
160#ifdef ENABLE_FLASH_SUPPORT
161/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100163
164#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
165
166/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200168#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_FLASH_CFI
Daniel Hellstromab68f922008-03-28 10:20:43 +0100170#endif
171
172/*
173 * Environment settings
174 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200175#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200176/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200177/*#define CONFIG_ENV_SIZE 0x8000*/
178#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100179#define CONFIG_ENV_OVERWRITE 1
180
181/*
182 * Memory map
183 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_SDRAM_BASE 0x40000000
185#define CONFIG_SYS_SDRAM_SIZE 0x00800000
186#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100187
188/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#undef CONFIG_SYS_SRAM_BASE
190#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstromab68f922008-03-28 10:20:43 +0100191
Daniel Hellstromab68f922008-03-28 10:20:43 +0100192/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
194#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
195#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstromab68f922008-03-28 10:20:43 +0100196
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200197#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100198
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200199#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100201
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
203#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100204
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200205#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
207# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstromab68f922008-03-28 10:20:43 +0100208#endif
209
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
211#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
212#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100213
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
215#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100216
217/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
219#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100220
221/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200222#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100223
224/*
225 * Ethernet configuration
226 */
227/*#define CONFIG_GRETH 1*/
Daniel Hellstromab68f922008-03-28 10:20:43 +0100228
Daniel Hellstromab68f922008-03-28 10:20:43 +0100229/*
230 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
231 */
232/* #define CONFIG_GRETH_10MBIT 1 */
233#define CONFIG_PHY_ADDR 0x00
234
235/*
236 * Miscellaneous configurable options
237 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100239#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200240#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100241#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100243#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
245#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
246#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100247
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
249#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100250
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100252
Daniel Hellstromab68f922008-03-28 10:20:43 +0100253/***** Gaisler GRLIB IP-Cores Config ********/
254
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255#define CONFIG_SYS_GRLIB_SDRAM 0
256#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100257#if CONFIG_GRSIM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100259#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200260#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstromab68f922008-03-28 10:20:43 +0100261#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200262#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100263
264/*** LEON2 UART 1 ***/
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -0700265
Daniel Hellstromab68f922008-03-28 10:20:43 +0100266/* UART1 Define to 1 or 0 */
267#define LEON2_UART1_LOOPBACK_ENABLE 0
268#define LEON2_UART1_FLOWCTRL_ENABLE 0
269#define LEON2_UART1_PARITY_ENABLE 0
270#define LEON2_UART1_ODDPAR_ENABLE 0
271
272/*** LEON2 UART 2 ***/
273
Daniel Hellstromab68f922008-03-28 10:20:43 +0100274/* UART2 Define to 1 or 0 */
275#define LEON2_UART2_LOOPBACK_ENABLE 0
276#define LEON2_UART2_FLOWCTRL_ENABLE 0
277#define LEON2_UART2_PARITY_ENABLE 0
278#define LEON2_UART2_ODDPAR_ENABLE 0
279
280#define LEON_CONSOLE_UART1 1
281#define LEON_CONSOLE_UART2 2
282
283/* Use UART2 as console */
284#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1
285
286/* LEON2 I/O Port */
287/*#define LEON2_IO_PORT_DIR 0x0000aa00*/
288
289/* default kernel command line */
290#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
291
Francois Retief4c547752015-10-28 16:49:02 +0200292#define CONFIG_IDENT_STRING " Gaisler GRSIM LEON2"
Daniel Hellstromab68f922008-03-28 10:20:43 +0100293
294#endif /* __CONFIG_H */