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Macpaul Lin00f892f2011-10-11 22:33:15 +00001/*
2 * linux/include/asm-nds/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * Copyright (C) 2011 Andes Technology Corporation
7 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Modifications:
15 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
16 * constant addresses and variable addresses.
17 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
18 * specific IO header files.
19 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
20 * 04-Apr-1999 PJB Added check_signature.
21 * 12-Dec-1999 RMK More cleanups
22 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
23 */
24#ifndef __ASM_NDS_IO_H
25#define __ASM_NDS_IO_H
26
27/*
28 * CAUTION:
29 * - do not implement for NDS32 Arch yet.
30 * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
31 * iinclude asm/io.h
32 */
33
34#ifdef __KERNEL__
35
36#include <linux/types.h>
37#include <asm/byteorder.h>
38
39static inline void sync(void)
40{
41}
42
43/*
44 * Given a physical address and a length, return a virtual address
45 * that can be used to access the memory range with the caching
46 * properties specified by "flags".
47 */
48#define MAP_NOCACHE (0)
49#define MAP_WRCOMBINE (0)
50#define MAP_WRBACK (0)
51#define MAP_WRTHROUGH (0)
52
53static inline void *
54map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
55{
56 return (void *)paddr;
57}
58
59/*
60 * Take down a mapping set up by map_physmem().
61 */
62static inline void unmap_physmem(void *vaddr, unsigned long flags)
63{
64
65}
66
67static inline phys_addr_t virt_to_phys(void *vaddr)
68{
69 return (phys_addr_t)(vaddr);
70}
71
72/*
73 * Generic virtual read/write. Note that we don't support half-word
74 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
75 * to the architecture specific code.
76 */
77#define __arch_getb(a) (*(unsigned char *)(a))
78#define __arch_getw(a) (*(unsigned short *)(a))
79#define __arch_getl(a) (*(unsigned int *)(a))
80
81#define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
82#define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
83#define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
84
85extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
86extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
87extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
88
89extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
90extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
91extern void __raw_readsl(unsigned int addr, void *data, int longlen);
92
93#define __raw_writeb(v, a) __arch_putb(v, a)
94#define __raw_writew(v, a) __arch_putw(v, a)
95#define __raw_writel(v, a) __arch_putl(v, a)
96
97#define __raw_readb(a) __arch_getb(a)
98#define __raw_readw(a) __arch_getw(a)
99#define __raw_readl(a) __arch_getl(a)
100
Macpaul Lina53ef5e2011-10-24 13:31:05 +0800101/*
102 * TODO: The kernel offers some more advanced versions of barriers, it might
103 * have some advantages to use them instead of the simple one here.
104 */
105#define dmb() __asm__ __volatile__ ("" : : : "memory")
106#define __iormb() dmb()
107#define __iowmb() dmb()
Macpaul Lin00f892f2011-10-11 22:33:15 +0000108
Macpaul Lina53ef5e2011-10-24 13:31:05 +0800109static inline void writeb(unsigned char val, unsigned char *addr)
110{
111 __iowmb();
112 __arch_putb(val, addr);
113}
114
115static inline void writew(unsigned short val, unsigned short *addr)
116{
117 __iowmb();
118 __arch_putw(val, addr);
119
120}
121
122static inline void writel(unsigned int val, unsigned int *addr)
123{
124 __iowmb();
125 __arch_putl(val, addr);
126}
127
128static inline unsigned char readb(unsigned char *addr)
129{
130 u8 val;
131
132 val = __arch_getb(addr);
133 __iormb();
134 return val;
135}
136
137static inline unsigned short readw(unsigned short *addr)
138{
139 u16 val;
140
141 val = __arch_getw(addr);
142 __iormb();
143 return val;
144}
145
146static inline unsigned int readl(unsigned int *addr)
147{
148 u32 val;
149
150 val = __arch_getl(addr);
151 __iormb();
152 return val;
153}
Macpaul Lin00f892f2011-10-11 22:33:15 +0000154
155/*
156 * The compiler seems to be incapable of optimising constants
157 * properly. Spell it out to the compiler in some cases.
158 * These are only valid for small values of "off" (< 1<<12)
159 */
160#define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
161#define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
162#define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
163
164#define __raw_base_readb(base, off) __arch_base_getb(base, off)
165#define __raw_base_readw(base, off) __arch_base_getw(base, off)
166#define __raw_base_readl(base, off) __arch_base_getl(base, off)
167
Macpaul Lind21f6e52011-09-23 18:00:13 +0800168#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
169#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
170
171#define out_le32(a, v) out_arch(l, le32, a, v)
172#define out_le16(a, v) out_arch(w, le16, a, v)
173
174#define in_le32(a) in_arch(l, le32, a)
175#define in_le16(a) in_arch(w, le16, a)
176
177#define out_be32(a, v) out_arch(l, be32, a, v)
178#define out_be16(a, v) out_arch(w, be16, a, v)
179
180#define in_be32(a) in_arch(l, be32, a)
181#define in_be16(a) in_arch(w, be16, a)
182
183#define out_8(a, v) __raw_writeb(v, a)
184#define in_8(a) __raw_readb(a)
185
Macpaul Lin00f892f2011-10-11 22:33:15 +0000186/*
Gabor Juhosbea28682013-05-26 12:11:26 +0200187 * Clear and set bits in one shot. These macros can be used to clear and
188 * set multiple bits in a register using a single call. These macros can
189 * also be used to set a multiple-bit bit pattern using a mask, by
190 * specifying the mask in the 'clear' parameter and the new bit pattern
191 * in the 'set' parameter.
192 */
193
194#define clrbits(type, addr, clear) \
195 out_##type((addr), in_##type(addr) & ~(clear))
196
197#define setbits(type, addr, set) \
198 out_##type((addr), in_##type(addr) | (set))
199
200#define clrsetbits(type, addr, clear, set) \
201 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
202
203#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
204#define setbits_be32(addr, set) setbits(be32, addr, set)
205#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
206
207#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
208#define setbits_le32(addr, set) setbits(le32, addr, set)
209#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
210
211#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
212#define setbits_be16(addr, set) setbits(be16, addr, set)
213#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
214
215#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
216#define setbits_le16(addr, set) setbits(le16, addr, set)
217#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
218
219#define clrbits_8(addr, clear) clrbits(8, addr, clear)
220#define setbits_8(addr, set) setbits(8, addr, set)
221#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
222
223/*
Macpaul Lin00f892f2011-10-11 22:33:15 +0000224 * Now, pick up the machine-defined IO definitions
225 * #include <asm/arch/io.h>
226 */
227
228/*
229 * IO port access primitives
230 * -------------------------
231 *
232 * The NDS32 doesn't have special IO access instructions just like ARM;
233 * all IO is memory mapped.
234 * Note that these are defined to perform little endian accesses
235 * only. Their primary purpose is to access PCI and ISA peripherals.
236 *
237 * Note that for a big endian machine, this implies that the following
238 * big endian mode connectivity is in place, as described by numerious
239 * ARM documents:
240 *
241 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
242 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
243 *
244 * The machine specific io.h include defines __io to translate an "IO"
245 * address to a memory address.
246 *
247 * Note that we prevent GCC re-ordering or caching values in expressions
248 * by introducing sequence points into the in*() definitions. Note that
249 * __raw_* do not guarantee this behaviour.
250 *
251 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
252 */
253#ifdef __io
254#define outb(v, p) __raw_writeb(v, __io(p))
255#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
256#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
257
258#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
259#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
260#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
261
262#define outsb(p, d, l) writesb(__io(p), d, l)
263#define outsw(p, d, l) writesw(__io(p), d, l)
264#define outsl(p, d, l) writesl(__io(p), d, l)
265
266#define insb(p, d, l) readsb(__io(p), d, l)
267#define insw(p, d, l) readsw(__io(p), d, l)
268#define insl(p, d, l) readsl(__io(p), d, l)
269
270static inline void readsb(unsigned int *addr, void * data, int bytelen)
271{
272 unsigned char *ptr = (unsigned char *)addr;
273 unsigned char *ptr2 = (unsigned char *)data;
274 while (bytelen) {
275 *ptr2 = *ptr;
276 ptr2++;
277 bytelen--;
278 }
279}
280
281static inline void readsw(unsigned int *addr, void * data, int wordlen)
282{
283 unsigned short *ptr = (unsigned short *)addr;
284 unsigned short *ptr2 = (unsigned short *)data;
285 while (wordlen) {
286 *ptr2 = *ptr;
287 ptr2++;
288 wordlen--;
289 }
290}
291
292static inline void readsl(unsigned int *addr, void * data, int longlen)
293{
294 unsigned int *ptr = (unsigned int *)addr;
295 unsigned int *ptr2 = (unsigned int *)data;
296 while (longlen) {
297 *ptr2 = *ptr;
298 ptr2++;
299 longlen--;
300 }
301}
302static inline void writesb(unsigned int *addr, const void * data, int bytelen)
303{
304 unsigned char *ptr = (unsigned char *)addr;
305 unsigned char *ptr2 = (unsigned char *)data;
306 while (bytelen) {
307 *ptr = *ptr2;
308 ptr2++;
309 bytelen--;
310 }
311}
312static inline void writesw(unsigned int *addr, const void * data, int wordlen)
313{
314 unsigned short *ptr = (unsigned short *)addr;
315 unsigned short *ptr2 = (unsigned short *)data;
316 while (wordlen) {
317 *ptr = *ptr2;
318 ptr2++;
319 wordlen--;
320 }
321}
322static inline void writesl(unsigned int *addr, const void * data, int longlen)
323{
324 unsigned int *ptr = (unsigned int *)addr;
325 unsigned int *ptr2 = (unsigned int *)data;
326 while (longlen) {
327 *ptr = *ptr2;
328 ptr2++;
329 longlen--;
330 }
331}
332#endif
333
334#define outb_p(val, port) outb((val), (port))
335#define outw_p(val, port) outw((val), (port))
336#define outl_p(val, port) outl((val), (port))
337#define inb_p(port) inb((port))
338#define inw_p(port) inw((port))
339#define inl_p(port) inl((port))
340
341#define outsb_p(port, from, len) outsb(port, from, len)
342#define outsw_p(port, from, len) outsw(port, from, len)
343#define outsl_p(port, from, len) outsl(port, from, len)
344#define insb_p(port, to, len) insb(port, to, len)
345#define insw_p(port, to, len) insw(port, to, len)
346#define insl_p(port, to, len) insl(port, to, len)
347
348/*
349 * ioremap and friends.
350 *
351 * ioremap takes a PCI memory address, as specified in
352 * linux/Documentation/IO-mapping.txt. If you want a
353 * physical address, use __ioremap instead.
354 */
355extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags);
356extern void __iounmap(void *addr);
357
358/*
359 * Generic ioremap support.
360 *
361 * Define:
362 * iomem_valid_addr(off,size)
363 * iomem_to_phys(off)
364 */
365#ifdef iomem_valid_addr
366#define __arch_ioremap(off, sz, nocache) \
367({ \
368 unsigned long _off = (off), _size = (sz); \
369 void *_ret = (void *)0; \
370 if (iomem_valid_addr(_off, _size)) \
371 _ret = __ioremap(iomem_to_phys(_off), _size, 0); \
372 _ret; \
373})
374
375#define __arch_iounmap __iounmap
376#endif
377
378#define ioremap(off, sz) __arch_ioremap((off), (sz), 0)
379#define ioremap_nocache(off, sz) __arch_ioremap((off), (sz), 1)
380#define iounmap(_addr) __arch_iounmap(_addr)
381
382/*
383 * DMA-consistent mapping functions. These allocate/free a region of
384 * uncached, unwrite-buffered mapped memory space for use with DMA
385 * devices. This is the "generic" version. The PCI specific version
386 * is in pci.h
387 */
388extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
389extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
390extern void consistent_sync(void *vaddr, size_t size, int rw);
391
392/*
393 * String version of IO memory access ops:
394 */
395extern void _memcpy_fromio(void *, unsigned long, size_t);
396extern void _memcpy_toio(unsigned long, const void *, size_t);
397extern void _memset_io(unsigned long, int, size_t);
398
399extern void __readwrite_bug(const char *fn);
400
401/*
402 * If this architecture has PCI memory IO, then define the read/write
403 * macros. These should only be used with the cookie passed from
404 * ioremap.
405 */
406#ifdef __mem_pci
407
408#define readb(c) ({ unsigned int __v = \
409 __raw_readb(__mem_pci(c)); __v; })
410#define readw(c) ({ unsigned int __v = \
411 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
412#define readl(c) ({ unsigned int __v = \
413 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
414
415#define writeb(v, c) __raw_writeb(v, __mem_pci(c))
416#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
417#define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
418
419#define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
420#define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
421#define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
422
423#define eth_io_copy_and_sum(s, c, l, b) \
424 eth_copy_and_sum((s), __mem_pci(c), (l), (b))
425
426static inline int
427check_signature(unsigned long io_addr, const unsigned char *signature,
428 int length)
429{
430 int retval = 0;
431 do {
432 if (readb(io_addr) != *signature)
433 goto out;
434 io_addr++;
435 signature++;
436 length--;
437 } while (length);
438 retval = 1;
439out:
440 return retval;
441}
Macpaul Lin00f892f2011-10-11 22:33:15 +0000442#endif /* __mem_pci */
443
444/*
445 * If this architecture has ISA IO, then define the isa_read/isa_write
446 * macros.
447 */
448#ifdef __mem_isa
449
450#define isa_readb(addr) __raw_readb(__mem_isa(addr))
451#define isa_readw(addr) __raw_readw(__mem_isa(addr))
452#define isa_readl(addr) __raw_readl(__mem_isa(addr))
453#define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
454#define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
455#define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
456#define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
457#define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
458#define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
459
460#define isa_eth_io_copy_and_sum(a, b, c, d) \
461 eth_copy_and_sum((a), __mem_isa(b), (c), (d))
462
463static inline int
464isa_check_signature(unsigned long io_addr, const unsigned char *signature,
465 int length)
466{
467 int retval = 0;
468 do {
469 if (isa_readb(io_addr) != *signature)
470 goto out;
471 io_addr++;
472 signature++;
473 length--;
474 } while (length);
475 retval = 1;
476out:
477 return retval;
478}
479
480#else /* __mem_isa */
481
482#define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
483#define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
484#define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
485#define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
486#define isa_writew(val, addr) __readwrite_bug("isa_writew")
487#define isa_writel(val, addr) __readwrite_bug("isa_writel")
488#define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
489#define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
490#define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
491
492#define isa_eth_io_copy_and_sum(a, b, c, d) \
493 __readwrite_bug("isa_eth_io_copy_and_sum")
494
495#define isa_check_signature(io, sig, len) (0)
496
497#endif /* __mem_isa */
498#endif /* __KERNEL__ */
499#endif /* __ASM_NDS_IO_H */