blob: d71a299785b5e2988071d4ea4a895ec1ab498108 [file] [log] [blame]
wdenkefee1702002-07-20 20:14:13 +00001/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
wdenkefee1702002-07-20 20:14:13 +000025/* Do we need any of these for elf?
26 __DYNAMIC = 0; */
27SECTIONS
28{
29 .resetvec 0xFFFFFFFC :
30 {
31 *(.resetvec)
32 } = 0xffff
wdenkf3e0de62003-06-04 15:05:30 +000033 .bootpg 0xFFFFF000 :
34 {
35 board/mpl/mip405/init.o (.bootpg)
36 } = 0xffff
wdenkefee1702002-07-20 20:14:13 +000037
38 /* Read-only sections, merged into text segment: */
39 . = + SIZEOF_HEADERS;
40 .interp : { *(.interp) }
41 .hash : { *(.hash) }
42 .dynsym : { *(.dynsym) }
43 .dynstr : { *(.dynstr) }
44 .rel.text : { *(.rel.text) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020045 .rela.text : { *(.rela.text) }
wdenkefee1702002-07-20 20:14:13 +000046 .rel.data : { *(.rel.data) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020047 .rela.data : { *(.rela.data) }
48 .rel.rodata : { *(.rel.rodata) }
49 .rela.rodata : { *(.rela.rodata) }
wdenkefee1702002-07-20 20:14:13 +000050 .rel.got : { *(.rel.got) }
51 .rela.got : { *(.rela.got) }
52 .rel.ctors : { *(.rel.ctors) }
53 .rela.ctors : { *(.rela.ctors) }
54 .rel.dtors : { *(.rel.dtors) }
55 .rela.dtors : { *(.rela.dtors) }
56 .rel.bss : { *(.rel.bss) }
57 .rela.bss : { *(.rela.bss) }
58 .rel.plt : { *(.rel.plt) }
59 .rela.plt : { *(.rela.plt) }
60 .init : { *(.init) }
61 .plt : { *(.plt) }
62 .text :
63 {
64 /* WARNING - the following is hand-optimized to fit within */
65 /* the sector layout of our flash chips! XXX FIXME XXX */
66
67 cpu/ppc4xx/start.o (.text)
68 board/mpl/mip405/init.o (.text)
69 cpu/ppc4xx/kgdb.o (.text)
70 cpu/ppc4xx/traps.o (.text)
71 cpu/ppc4xx/interrupts.o (.text)
Stefan Roese882ae412007-10-22 15:44:39 +020072 cpu/ppc4xx/4xx_uart.o (.text)
wdenkefee1702002-07-20 20:14:13 +000073 cpu/ppc4xx/cpu_init.o (.text)
74 cpu/ppc4xx/speed.o (.text)
Ben Warren4d03a4e2008-11-09 21:29:23 -080075 drivers/net/4xx_enet.o (.text)
wdenkefee1702002-07-20 20:14:13 +000076 common/dlmalloc.o (.text)
77 lib_generic/crc32.o (.text)
78 lib_ppc/extable.o (.text)
79 lib_generic/zlib.o (.text)
80
81/* . = env_offset;*/
Jean-Christophe PLAGNIOL-VILLARD0cf4fd32008-09-10 22:48:01 +020082/* common/env_embedded.o(.text)*/
wdenkefee1702002-07-20 20:14:13 +000083
84 *(.text)
85 *(.fixup)
86 *(.got1)
87 }
88 _etext = .;
89 PROVIDE (etext = .);
90 .rodata :
91 {
Wolfgang Denk74812662005-12-12 16:06:05 +010092 *(.eh_frame)
Trent Piephof62fb992009-02-18 15:22:05 -080093 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenkefee1702002-07-20 20:14:13 +000094 }
95 .fini : { *(.fini) } =0
96 .ctors : { *(.ctors) }
97 .dtors : { *(.dtors) }
98
99 /* Read-write section, merged into data segment: */
100 . = (. + 0x00FF) & 0xFFFFFF00;
101 _erotext = .;
102 PROVIDE (erotext = .);
103 .reloc :
104 {
105 *(.got)
106 _GOT2_TABLE_ = .;
107 *(.got2)
108 _FIXUP_TABLE_ = .;
109 *(.fixup)
110 }
111 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
112 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
113
114 .data :
115 {
116 *(.data)
117 *(.data1)
118 *(.sdata)
119 *(.sdata2)
120 *(.dynamic)
121 CONSTRUCTORS
122 }
123 _edata = .;
124 PROVIDE (edata = .);
125
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200126 . = .;
wdenk8bde7f72003-06-27 21:31:46 +0000127 __u_boot_cmd_start = .;
128 .u_boot_cmd : { *(.u_boot_cmd) }
129 __u_boot_cmd_end = .;
130
131
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200132 . = .;
wdenkefee1702002-07-20 20:14:13 +0000133 __start___ex_table = .;
134 __ex_table : { *(__ex_table) }
135 __stop___ex_table = .;
136
137 . = ALIGN(256);
138 __init_begin = .;
139 .text.init : { *(.text.init) }
140 .data.init : { *(.data.init) }
141 . = ALIGN(256);
142 __init_end = .;
143
144 __bss_start = .;
Wolfgang Denk64134f02008-01-12 20:31:39 +0100145 .bss (NOLOAD) :
wdenkefee1702002-07-20 20:14:13 +0000146 {
147 *(.sbss) *(.scommon)
148 *(.dynbss)
149 *(.bss)
150 *(COMMON)
Selvamuthukumar9b827cf2008-10-16 22:54:03 +0530151 . = ALIGN(4);
wdenkefee1702002-07-20 20:14:13 +0000152 }
153 _end = . ;
154 PROVIDE (end = .);
155}