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Simon Glass69d59b42013-03-05 14:39:35 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
4 * (C) Copyright 2000 - 2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glass69d59b42013-03-05 14:39:35 +00008 ********************************************************************
9 * NOTE: This header file defines an interface to U-Boot. Including
10 * this (unmodified) header file in another file is considered normal
11 * use of U-Boot, and does *not* fall under the heading of "derived
12 * work".
13 ********************************************************************
14 */
15
16#ifndef __ASM_GENERIC_U_BOOT_H__
17#define __ASM_GENERIC_U_BOOT_H__
18
19/*
20 * Board information passed to Linux kernel from U-Boot
21 *
22 * include/asm-ppc/u-boot.h
23 */
24
25#ifndef __ASSEMBLY__
26
27typedef struct bd_info {
28 unsigned long bi_memstart; /* start of DRAM memory */
29 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
30 unsigned long bi_flashstart; /* start of FLASH memory */
31 unsigned long bi_flashsize; /* size of FLASH memory */
32 unsigned long bi_flashoffset; /* reserved area for startup monitor */
33 unsigned long bi_sramstart; /* start of SRAM memory */
34 unsigned long bi_sramsize; /* size of SRAM memory */
Andreas Bießmanna752a8b2015-02-06 23:06:48 +010035#ifdef CONFIG_AVR32
36 unsigned char bi_phy_id[4]; /* PHY address for ATAG_ETHERNET */
37 unsigned long bi_board_number;/* ATAG_BOARDINFO */
38#endif
Simon Glass69d59b42013-03-05 14:39:35 +000039#ifdef CONFIG_ARM
40 unsigned long bi_arm_freq; /* arm frequency */
41 unsigned long bi_dsp_freq; /* dsp core frequency */
42 unsigned long bi_ddr_freq; /* ddr frequency */
43#endif
Masahiro Yamada58dac322014-03-05 17:40:10 +090044#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \
Simon Glass69d59b42013-03-05 14:39:35 +000045 || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
46 unsigned long bi_immr_base; /* base of IMMR register */
47#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +010048#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glass69d59b42013-03-05 14:39:35 +000049 unsigned long bi_mbar_base; /* base of internal registers */
50#endif
51#if defined(CONFIG_MPC83xx)
52 unsigned long bi_immrbar;
53#endif
Simon Glass69d59b42013-03-05 14:39:35 +000054 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
55 unsigned long bi_ip_addr; /* IP Address */
56 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
57 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
58 unsigned long bi_intfreq; /* Internal Freq, in MHz */
59 unsigned long bi_busfreq; /* Bus Freq, in MHz */
60#if defined(CONFIG_CPM2)
61 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
62 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
63 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
64 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
65#endif
66#if defined(CONFIG_MPC512X)
67 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
68#endif /* CONFIG_MPC512X */
69#if defined(CONFIG_MPC5xxx)
70 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
71 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
72#endif
Simon Glass69d59b42013-03-05 14:39:35 +000073#if defined(CONFIG_405) || \
74 defined(CONFIG_405GP) || \
Simon Glass69d59b42013-03-05 14:39:35 +000075 defined(CONFIG_405EP) || \
76 defined(CONFIG_405EZ) || \
77 defined(CONFIG_405EX) || \
78 defined(CONFIG_440)
79 unsigned char bi_s_version[4]; /* Version of this structure */
80 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
81 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
82 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
83 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
84 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
85#endif
Simon Glass69d59b42013-03-05 14:39:35 +000086
87#ifdef CONFIG_HAS_ETH1
88 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
89#endif
90#ifdef CONFIG_HAS_ETH2
91 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
92#endif
93#ifdef CONFIG_HAS_ETH3
94 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
95#endif
96#ifdef CONFIG_HAS_ETH4
97 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
98#endif
99#ifdef CONFIG_HAS_ETH5
100 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
101#endif
102
103#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
104 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
105 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
106 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
107 defined(CONFIG_460EX) || defined(CONFIG_460GT)
108 unsigned int bi_opbfreq; /* OPB clock in Hz */
109 int bi_iic_fast[2]; /* Use fast i2c mode */
110#endif
Simon Glass69d59b42013-03-05 14:39:35 +0000111#if defined(CONFIG_4xx)
112#if defined(CONFIG_440GX) || \
113 defined(CONFIG_460EX) || defined(CONFIG_460GT)
114 int bi_phynum[4]; /* Determines phy mapping */
115 int bi_phymode[4]; /* Determines phy mode */
116#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
117 int bi_phynum[2]; /* Determines phy mapping */
118 int bi_phymode[2]; /* Determines phy mode */
119#else
120 int bi_phynum[1]; /* Determines phy mapping */
121 int bi_phymode[1]; /* Determines phy mode */
122#endif
123#endif /* defined(CONFIG_4xx) */
124 ulong bi_arch_number; /* unique id for this board */
125 ulong bi_boot_params; /* where this board expects params */
126#ifdef CONFIG_NR_DRAM_BANKS
127 struct { /* RAM configuration */
128 ulong start;
129 ulong size;
130 } bi_dram[CONFIG_NR_DRAM_BANKS];
131#endif /* CONFIG_NR_DRAM_BANKS */
132} bd_t;
133
134#endif /* __ASSEMBLY__ */
135
136#endif /* __ASM_GENERIC_U_BOOT_H__ */