blob: eb92264f9d6aff6cea59a22b32bfbf672e5ba690 [file] [log] [blame]
Stephen Warrend5ebc932012-05-15 06:45:28 +00001/dts-v1/;
2
Tom Warren6c5be642013-02-21 12:31:27 +00003#include "tegra20.dtsi"
Stephen Warrend5ebc932012-05-15 06:45:28 +00004
5/ {
Allen Martin00a27492012-08-31 08:30:00 +00006 model = "NVIDIA Tegra20 Whistler evaluation board";
Stephen Warrend5ebc932012-05-15 06:45:28 +00007 compatible = "nvidia,whistler", "nvidia,tegra20";
8
9 aliases {
10 i2c0 = "/i2c@7000d000";
11 usb0 = "/usb@c5008000";
Tom Warren126685a2013-02-21 12:31:29 +000012 sdhci0 = "/sdhci@c8000600";
13 sdhci1 = "/sdhci@c8000400";
Stephen Warrend5ebc932012-05-15 06:45:28 +000014 };
15
16 memory {
17 device_type = "memory";
18 reg = < 0x00000000 0x20000000 >;
19 };
20
Stephen Warrend5ebc932012-05-15 06:45:28 +000021 serial@70006000 {
22 clock-frequency = < 216000000 >;
23 };
24
25 i2c@7000c000 {
26 status = "disabled";
27 };
28
29 i2c@7000c400 {
30 status = "disabled";
31 };
32
33 i2c@7000c500 {
34 status = "disabled";
35 };
36
37 i2c@7000d000 {
38 clock-frequency = <100000>;
39
40 pmic@3c {
41 compatible = "maxim,max8907b";
42 reg = <0x3c>;
43
44 clk_32k: clock {
45 compatible = "fixed-clock";
46 /*
47 * leave out for now due to CPP:
48 * #clock-cells = <0>;
49 */
50 clock-frequency = <32768>;
51 };
52 };
53 };
54
Stephen Warren56f42f82012-10-12 09:45:50 +000055 usb@c5000000 {
56 status = "disabled";
57 };
58
Stephen Warrend5ebc932012-05-15 06:45:28 +000059 usb@c5004000 {
60 status = "disabled";
61 };
Tom Warren126685a2013-02-21 12:31:29 +000062
63 sdhci@c8000400 {
64 status = "okay";
65 wp-gpios = <&gpio 173 0>; /* gpio PV5 */
66 bus-width = <8>;
67 };
68
69 sdhci@c8000600 {
70 status = "okay";
71 bus-width = <8>;
72 };
Stephen Warrend5ebc932012-05-15 06:45:28 +000073};