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Yuri Tikhonov65b20dc2008-02-04 14:10:42 +01001/*
2 * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
3 *
4 * Developed for DENX Software Engineering GmbH
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010027#include <post.h>
28
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020029#if CONFIG_POST & CONFIG_SYS_POST_DSP
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010030#include <asm/io.h>
31
32/* This test verifies DSP status bits in FPGA */
33
34DECLARE_GLOBAL_DATA_PTR;
35
36#define DSP_STATUS_REG 0xC4000008
37
38int dsp_post_test(int flags)
39{
40 uint read_value;
41 int ret;
42
43 ret = 0;
44 read_value = in_be32((void *)DSP_STATUS_REG) & 0x3;
45 if (read_value != 0x3) {
46 post_log("\nDSP status read %08X\n", read_value);
47 ret = 1;
48 }
49
50 return ret;
51}
52
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */