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wdenk63e73c92004-02-23 22:22:28 +00001/*
2 * (C) Copyright 2004
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuration settings for the TI OMAP 1610 H2 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
wdenk63e73c92004-02-23 22:22:28 +000030 * High Level Configuration Options
31 * (easy to change)
32 */
33#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
34#define CONFIG_OMAP 1 /* in a TI OMAP core */
35#define CONFIG_OMAP1610 1 /* which is in a 1610 */
36#define CONFIG_H2_OMAP1610 1 /* on an H2 Board */
wdenka1f4a3d2004-07-11 22:19:26 +000037#define CONFIG_MACH_OMAP_H2 /* Select board mach-type */
wdenk63e73c92004-02-23 22:22:28 +000038
39/* input clock of PLL */
40/* the OMAP1610 H2 has 12MHz input clock */
41#define CONFIG_SYS_CLK_FREQ 12000000
42
43#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
44
45#define CONFIG_MISC_INIT_R
46
47#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48#define CONFIG_SETUP_MEMORY_TAGS 1
wdenk08b6aa62004-10-10 18:49:14 +000049#define CONFIG_INITRD_TAG 1
wdenk63e73c92004-02-23 22:22:28 +000050
51/*
52 * Size of malloc() pool
53 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
55#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenk63e73c92004-02-23 22:22:28 +000056
57/*
58 * Hardware drivers
59 */
Nishanth Menonac6b3622009-10-16 00:06:37 -050060#define CONFIG_NET_MULTI
61#define CONFIG_LAN91C96
wdenk63e73c92004-02-23 22:22:28 +000062#define CONFIG_LAN91C96_BASE 0x04000300
63#define CONFIG_LAN91C96_EXT_PHY
64
65/*
66 * NS16550 Configuration
67 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#define CONFIG_SYS_NS16550
69#define CONFIG_SYS_NS16550_SERIAL
70#define CONFIG_SYS_NS16550_REG_SIZE (-4)
71#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
72#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */
wdenk028ab6b2004-02-23 23:54:43 +000073
wdenk63e73c92004-02-23 22:22:28 +000074/*
75 * select serial console configuration
76 */
77#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 H2 */
78
79/* allow to overwrite serial and ethaddr */
80#define CONFIG_ENV_OVERWRITE
81#define CONFIG_CONS_INDEX 1
82#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
wdenk63e73c92004-02-23 22:22:28 +000084
Jon Loeligera5cb2302007-07-04 22:33:13 -050085
86/*
87 * Command line configuration.
88 */
89#include <config_cmd_default.h>
90
91#define CONFIG_CMD_DHCP
92
93
Jon Loeligerd3b8c1a2007-07-09 21:57:31 -050094/*
95 * BOOTP options
96 */
97#define CONFIG_BOOTP_SUBNETMASK
98#define CONFIG_BOOTP_GATEWAY
99#define CONFIG_BOOTP_HOSTNAME
100#define CONFIG_BOOTP_BOOTPATH
101
wdenk63e73c92004-02-23 22:22:28 +0000102
wdenk63e73c92004-02-23 22:22:28 +0000103#include <configs/omap1510.h>
104
105#define CONFIG_BOOTDELAY 3
wdenk08b6aa62004-10-10 18:49:14 +0000106#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp"
wdenk855a4962004-03-14 18:23:55 +0000107#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200108#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
wdenk63e73c92004-02-23 22:22:28 +0000109
Jon Loeligera5cb2302007-07-04 22:33:13 -0500110#if defined(CONFIG_CMD_KGDB)
wdenk63e73c92004-02-23 22:22:28 +0000111#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
112#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
113#endif
114
115/*
116 * Miscellaneous configurable options
117 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_LONGHELP /* undef to save memory */
119#define CONFIG_SYS_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */
120#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenk63e73c92004-02-23 22:22:28 +0000121/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
123#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
124#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk63e73c92004-02-23 22:22:28 +0000125
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
127#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
wdenk63e73c92004-02-23 22:22:28 +0000128
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
wdenk63e73c92004-02-23 22:22:28 +0000130
131/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
132 * DPLL1. This time is further subdivided by a local divisor.
133 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
Ladislav Michl81472d82009-03-30 18:58:41 +0200135#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
136#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
wdenk63e73c92004-02-23 22:22:28 +0000137
138/*-----------------------------------------------------------------------
139 * Stack sizes
140 *
141 * The stack sizes are set up in start.S using the settings below
142 */
143#define CONFIG_STACKSIZE (128*1024) /* regular stack */
144#ifdef CONFIG_USE_IRQ
145#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
146#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
147#endif
148
149/*-----------------------------------------------------------------------
150 * Physical Memory Map
151 */
wdenk3ff02c22004-06-09 15:25:53 +0000152#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
153#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
wdenk63e73c92004-02-23 22:22:28 +0000154#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
155
wdenk3ff02c22004-06-09 15:25:53 +0000156#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
157#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
wdenk63e73c92004-02-23 22:22:28 +0000158
wdenk3ff02c22004-06-09 15:25:53 +0000159#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
wdenkca0e7742004-06-09 15:37:23 +0000160
wdenk3ff02c22004-06-09 15:25:53 +0000161#ifndef __ASSEMBLY__
162extern unsigned long omap_flash_base; /* set in flash__init */
163#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164#define CONFIG_SYS_FLASH_BASE omap_flash_base
wdenk3ff02c22004-06-09 15:25:53 +0000165
166#elif defined(CONFIG_CS0_BOOT)
167
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0
wdenk3ff02c22004-06-09 15:25:53 +0000169
170#else
171
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1
wdenk3ff02c22004-06-09 15:25:53 +0000173
174#endif
wdenk63e73c92004-02-23 22:22:28 +0000175
176/*-----------------------------------------------------------------------
177 * FLASH and environment organization
178 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
wdenk63e73c92004-02-23 22:22:28 +0000180#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
wdenk63e73c92004-02-23 22:22:28 +0000182/* addr of environment */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
wdenk63e73c92004-02-23 22:22:28 +0000184
185/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
187#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenk63e73c92004-02-23 22:22:28 +0000188
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200189#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200190#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
191#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
wdenk63e73c92004-02-23 22:22:28 +0000192
193#endif /* __CONFIG_H */