Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, michael@schwingen.org |
| 4 | * |
| 5 | * (C) Copyright 2006 |
| 6 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 7 | * |
| 8 | * (C) Copyright 2002 |
| 9 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| 10 | * |
| 11 | * (C) Copyright 2002 |
| 12 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 13 | * Marius Groeger <mgroeger@sysgo.de> |
| 14 | * |
| 15 | * See file CREDITS for list of people who contributed to this |
| 16 | * project. |
| 17 | * |
| 18 | * This program is free software; you can redistribute it and/or |
| 19 | * modify it under the terms of the GNU General Public License as |
| 20 | * published by the Free Software Foundation; either version 2 of |
| 21 | * the License, or (at your option) any later version. |
| 22 | * |
| 23 | * This program is distributed in the hope that it will be useful, |
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 26 | * GNU General Public License for more details. |
| 27 | * |
| 28 | * You should have received a copy of the GNU General Public License |
| 29 | * along with this program; if not, write to the Free Software |
| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 31 | * MA 02111-1307 USA |
| 32 | */ |
| 33 | |
| 34 | #include <common.h> |
| 35 | #include <command.h> |
| 36 | #include <malloc.h> |
| 37 | #include <asm/arch/ixp425.h> |
| 38 | #include <asm/io.h> |
| 39 | |
| 40 | #include <miiphy.h> |
| 41 | |
| 42 | #include "actux3_hw.h" |
| 43 | |
| 44 | DECLARE_GLOBAL_DATA_PTR; |
| 45 | |
| 46 | int board_init (void) |
| 47 | { |
| 48 | gd->bd->bi_arch_number = MACH_TYPE_ACTUX3; |
| 49 | |
| 50 | /* adress of boot parameters */ |
| 51 | gd->bd->bi_boot_params = 0x00000100; |
| 52 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST); |
| 54 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_ETHRST); |
| 55 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DSR); |
| 56 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DCD); |
| 57 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED5_GN); |
| 58 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED6_RT); |
| 59 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED6_GN); |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 60 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST); |
| 62 | GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_ETHRST); |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 63 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 64 | GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_DSR); |
| 65 | GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_DCD); |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 66 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 67 | GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_LED5_GN); |
| 68 | GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_LED6_RT); |
| 69 | GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_LED6_GN); |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 70 | |
| 71 | /* |
| 72 | * Setup GPIO's for Interrupt inputs |
| 73 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_DBGINT); |
| 75 | GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_ETHINT); |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 76 | |
| 77 | /* |
| 78 | * Setup GPIO's for 33MHz clock output |
| 79 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 80 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK); |
| 81 | GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 82 | *IXP425_GPIO_GPCLKR = 0x011001FF; |
| 83 | |
| 84 | /* CS1: IPAC-X */ |
| 85 | *IXP425_EXP_CS1 = 0x94d10013; |
| 86 | /* CS5: Debug port */ |
| 87 | *IXP425_EXP_CS5 = 0x9d520003; |
| 88 | /* CS6: Release/Option register */ |
| 89 | *IXP425_EXP_CS6 = 0x81860001; |
| 90 | /* CS7: LEDs */ |
| 91 | *IXP425_EXP_CS7 = 0x80900003; |
| 92 | |
| 93 | udelay (533); |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 94 | GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); |
| 95 | GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_ETHRST); |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 96 | |
| 97 | ACTUX3_LED1_RT (1); |
| 98 | ACTUX3_LED1_GN (0); |
| 99 | ACTUX3_LED2_RT (0); |
| 100 | ACTUX3_LED2_GN (0); |
| 101 | ACTUX3_LED3_RT (0); |
| 102 | ACTUX3_LED3_GN (0); |
| 103 | ACTUX3_LED4_GN (0); |
| 104 | ACTUX3_LED5_RT (0); |
| 105 | |
| 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | /* |
| 110 | * Check Board Identity |
| 111 | */ |
| 112 | int checkboard (void) |
| 113 | { |
Michael Schwingen | bc24345 | 2008-01-16 19:51:55 +0100 | [diff] [blame] | 114 | char *s = getenv ("serial#"); |
| 115 | |
| 116 | puts ("Board: AcTux-3 rev."); |
| 117 | putc (ACTUX3_BOARDREL + 'A' - 1); |
| 118 | |
| 119 | if (s != NULL) { |
| 120 | puts (", serial# "); |
| 121 | puts (s); |
| 122 | } |
| 123 | putc ('\n'); |
| 124 | |
| 125 | return (0); |
| 126 | } |
| 127 | |
| 128 | /************************************************************************* |
| 129 | * get_board_rev() - setup to pass kernel board revision information |
| 130 | * 0 = reserved |
| 131 | * 1 = Rev. A |
| 132 | * 2 = Rev. B |
| 133 | *************************************************************************/ |
| 134 | u32 get_board_rev (void) |
| 135 | { |
| 136 | return ACTUX3_BOARDREL; |
| 137 | } |
| 138 | |
| 139 | int dram_init (void) |
| 140 | { |
| 141 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 142 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
| 143 | |
| 144 | return (0); |
| 145 | } |
| 146 | |
| 147 | void reset_phy (void) |
| 148 | { |
| 149 | int i; |
| 150 | |
| 151 | /* initialize the PHY */ |
| 152 | miiphy_reset ("NPE0", CONFIG_PHY_ADDR); |
| 153 | |
| 154 | /* all LED outputs = Link/Act */ |
| 155 | miiphy_write ("NPE0", CONFIG_PHY_ADDR, 0x16, 0x0AAA); |
| 156 | |
| 157 | /* |
| 158 | * The Marvell 88E6060 switch comes up with all ports disabled. |
| 159 | * set all ethernet switch ports to forwarding state |
| 160 | */ |
| 161 | for (i = 1; i <= 5; i++) |
| 162 | miiphy_write ("NPE0", CONFIG_PHY_ADDR + 8 + i, 0x04, 0x03); |
| 163 | |
| 164 | } |