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wdenkaffae2b2002-08-17 09:36:01 +00001/*
2 * Support for indirect PCI bridges.
3 *
4 * Copyright (C) 1998 Gabriel Paubert.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <common.h>
13
14#ifdef CONFIG_PCI
Wolfgang Denk3706ba12005-09-25 00:00:45 +020015#if (!defined(__I386__) && !defined(CONFIG_IXDP425))
wdenkaffae2b2002-08-17 09:36:01 +000016
17#include <asm/processor.h>
18#include <asm/io.h>
19#include <pci.h>
20
21#define cfg_read(val, addr, type, op) *val = op((type)(addr))
22#define cfg_write(val, addr, type, op) op((type *)(addr), (val))
23
wdenk289f9322005-01-12 00:15:14 +000024#ifdef CONFIG_IXP425
25extern unsigned char in_8 (volatile unsigned *addr);
26extern unsigned short in_le16 (volatile unsigned *addr);
27extern unsigned in_le32 (volatile unsigned *addr);
28extern void out_8 (volatile unsigned *addr, char val);
29extern void out_le16 (volatile unsigned *addr, unsigned short val);
30extern void out_le32 (volatile unsigned *addr, unsigned int val);
31#endif /* CONFIG_IXP425 */
32
wdenk5d232d02003-05-22 22:52:13 +000033#if defined(CONFIG_MPC8260)
wdenk4d75a502003-03-25 16:50:56 +000034#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
35static int \
36indirect_##rw##_config_##size(struct pci_controller *hose, \
37 pci_dev_t dev, int offset, type val) \
38{ \
Kumar Galadffb70f2006-01-12 15:30:24 -060039 u32 b, d,f; \
40 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
41 b = b - hose->first_busno; \
42 dev = PCI_BDF(b, d, f); \
wdenk4d75a502003-03-25 16:50:56 +000043 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
44 sync(); \
45 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
46 return 0; \
47}
wdenk42d1f032003-10-15 23:53:47 +000048#elif defined(CONFIG_E500)
49#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
50static int \
51indirect_##rw##_config_##size(struct pci_controller *hose, \
52 pci_dev_t dev, int offset, type val) \
53{ \
Kumar Galadffb70f2006-01-12 15:30:24 -060054 u32 b, d,f; \
55 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
56 b = b - hose->first_busno; \
57 dev = PCI_BDF(b, d, f); \
wdenk42d1f032003-10-15 23:53:47 +000058 *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000; \
59 sync(); \
60 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
61 return 0; \
62}
Stefan Roese846b0dd2005-08-08 12:42:22 +020063#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
wdenk3c74e322004-02-22 23:46:08 +000064#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
65static int \
66indirect_##rw##_config_##size(struct pci_controller *hose, \
67 pci_dev_t dev, int offset, type val) \
68{ \
Kumar Galadffb70f2006-01-12 15:30:24 -060069 u32 b, d,f; \
70 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
71 b = b - hose->first_busno; \
72 dev = PCI_BDF(b, d, f); \
wdenk3c74e322004-02-22 23:46:08 +000073 if (PCI_BUS(dev) > 0) \
74 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
75 else \
76 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
77 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
78 return 0; \
79}
wdenk4d75a502003-03-25 16:50:56 +000080#else
wdenkaffae2b2002-08-17 09:36:01 +000081#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
82static int \
83indirect_##rw##_config_##size(struct pci_controller *hose, \
84 pci_dev_t dev, int offset, type val) \
85{ \
Kumar Galadffb70f2006-01-12 15:30:24 -060086 u32 b, d,f; \
87 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
88 b = b - hose->first_busno; \
89 dev = PCI_BDF(b, d, f); \
wdenkaffae2b2002-08-17 09:36:01 +000090 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
91 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
92 return 0; \
93}
wdenk4d75a502003-03-25 16:50:56 +000094#endif
wdenkaffae2b2002-08-17 09:36:01 +000095
96#define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \
97static int \
98indirect_##rw##_config_##size(struct pci_controller *hose, \
99 pci_dev_t dev, int offset, type val) \
100{ \
101 unsigned int msr = mfmsr(); \
102 mtmsr(msr & ~(MSR_EE | MSR_CE)); \
103 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
104 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
105 out_le32(hose->cfg_addr, 0x00000000); \
106 mtmsr(msr); \
107 return 0; \
108}
109
110INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
111INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
112INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
113#ifdef CONFIG_405GP
114INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
115INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
116INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
117#else
118INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
119INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
120INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
121#endif
122
123void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
124{
125 pci_set_ops(hose,
126 indirect_read_config_byte,
127 indirect_read_config_word,
128 indirect_read_config_dword,
129 indirect_write_config_byte,
130 indirect_write_config_word,
131 indirect_write_config_dword);
132
133 hose->cfg_addr = (unsigned int *) cfg_addr;
134 hose->cfg_data = (unsigned char *) cfg_data;
135}
136
Wolfgang Denk3706ba12005-09-25 00:00:45 +0200137#endif /* !__I386__ && !CONFIG_IXDP425 */
138#endif /* CONFIG_PCI */